gnu make, vpath rule, all but one file - gnu

It happens to need to compile all *.c files from one folder, except one, which has exactlly the same name and is compiled from somwhere else. I solved by giving vpath for each file I want separately
vpath plant.c $(KMLROOT)/examples/$(KML_FLAVOUR)/pdk
vpath app.c $(KMLROOT)/examples/$(KML_FLAVOUR)/pdk
vpath app_test.c $(KMLROOT)/examples/$(KML_FLAVOUR)/pdk
vpath app_echo.c $(KMLROOT)/examples/$(KML_FLAVOUR)/pdk
Now if I write
vpath %.c $(KMLROOT)/examples/$(KML_FLAVOUR)/pdk
The file that I don't want to include will be on path.
There is a possibility to write some rule and exclude specific file?

If you need to provide a specific path for every file, then vpath is useless.
Since you don't give any other information about what you do with the source files, I can't give a complete example, but why don't you just do something like:
KMLSRC = plant.c app.c app_test.c app_echo.c
KML_FULLSRC = $(addprefix $(KMLROOT)/examples/$(KML_FLAVOUR)/,$(KMLSRC))

Related

How to creat only object file without executable?

I am trying to create an object file through a make file which will be called in another script.
The following is my make file for creating an object file.
SOURCE_CK = ../SOURCES_COUNTERFLOW/
SOURCES_f77 = $(SOURCE_CK)density.f
#TARGET =
OBJECTS = $(SOURCES_f77:.f=.o)
COMPILE = f77
.f.o :
$(COMPILE) -o $*.o -c $*.f
#$(TARGET) : $(OBJECTS)
# $(COMPILE) $(OBJECTS) -o $#
#del :
# /bin/rm $(OBJECTS)
When I run the above script, the following error gets generated.
make: *** No targets. Stop.
Now I know I have to make some modification with TARGET but not sure where to start or how to modify the target.
Again, my goal is to run the script and generate density.o file.
Any help would be appreciated.
GNU Make has built-in rules for making fortran object files from sources, and fortran programs from object files, see https://www.gnu.org/software/make/manual/html_node/Catalogue-of-Rules.html
Your makefile can therefore be condensed into just the following:
$(TARGET): $(OBJECTS)
Should you want to generate just the object, you can even do that without a makefile:
# make density.o from a sourcefile
make density.o
Note the built-in rules put the object files next to the source files (unless using VPATH etc etc, more about that in the manual), so you'd call it like
make ../SOURCES_COUNTERFLOW/density.o

Use make to only copy files that have changed

I have a folder with a lot of header (.h) files and to install our library I need to copy these files to a system folder. However I would like to copy only the files that have changed. How can I do that using just make and cp, without having to use any other tool like rsync?
You could use constructs like this:
/path/to/system/header.h: /path/to/local/header.h
cp $^ $#
which copies the local header to the system header if the local version is newer.
If you have GNU make, like on Ubuntu, you can create fancy functions, like this.
It copies updated header files from directory SRCDIR to DSTDIR. Try it by running make all. It should only copy newer files and do nothing on a second run.
.DEFAULT_GOAL = all
SRCDIR = local
DSTDIR = system
HEADERS = $(shell cd $(SRCDIR); ls *.h)
# Define function; $(1) is the header file name.
define copyheader =
$(DSTDIR)/$(1): $(SRCDIR)/$(1)
cp $$^ $$#
endef
# Use function to create recipes for each header file.
$(foreach file,$(HEADERS),$(eval $(call copyheader,$(file))))
# Depend on all destination headers.
all: $(addprefix $(DSTDIR)/,$(HEADERS))

Can not find object file with cmake link_directories

I want to add several .o files to the link process. If I do it like this:
TARGET_LINK_LIBRARIES(FFMPEGTest stdc++fs -pthread /home/stiv2/jsoft/nv-ffmpeg/ffmpeg/libswresample/audioconvert.o ...some more stuff... )
then it finds the file. All of these files are in the same directory, so I want to add them semultaneously:
link_directories(/home/stiv2/jsoft/nv-ffmpeg/ffmpeg/libswresample/)
TARGET_LINK_LIBRARIES(FFMPEGTest stdc++fs -pthread audioconvert.o ...some more stuff... )
but this doesn't work:
/usr/bin/ld: cannot find -laudioconvert.o
how do I fix this?
Documentation for target_link_libraries doesn't allow a relative path (audioconvert.o) to be a parameter to that command. It should be either absolute path (/home/stiv2/jsoft/nv-ffmpeg/ffmpeg/libswresample/audioconvert.o) or a plain library name (like z for libz.a library).
Because the object file audioconvert.o is not a library, it cannot be specified with a plain library name. You have no other choice than specify an absolute path for the object files.
For specify several object files in some directory you may use foreach loop:
foreach(obj audioconvert.o foo.o bar.o)
target_link_libraries(FFMPEGTest /home/stiv2/jsoft/nv-ffmpeg/ffmpeg/libswresample/${obj})
endforeach()
Actually, every parameter <param> to target_link_libraries, which doesn't look like an absolute path (and doesn't corresponds to a library target), is transformed into -l<param> option for the linker.
The linker interprets this parameter as a plain library name, and searches for a file named lib<param>.a or lib<param>.so in the link directories.
So, with parameter -laudioconvert.o the linker searches a file with a name libaudioconvert.o.a - obviously, this is not what do you want.

Linux Kbuild: what is the difference between $(src) and $(obj)

In Documentation/kbuild/makefiles.txt chapter 3.10 it is mentioned that $(src) refers to the location of the source code while $(obj) refers to the location of the generated output files. I am confused about this when using a different output directory.
In Makefile.build the very first thing that is done is src := $(obj). How does that make any sense? If I print $(src) and $(obj) they always have the same value.
However, what is even more confusing to me, is that if this was the case, make should issue an error.
If the working directory is outside the kernel source (O=path/to/out/dir) when the rule $(obj)/%.o: $(src)/%.c is evaluated it should search for the source file relative to the output directory. And since the source file is not there it should fail saying it cannot find a rule for $(src)/%.c target.
Can someone please explain what I'm getting wrong here?
Answering my own question in case others wondered about this...
The main Makefile uses vpath to add the src location, so when kbuild does not find the source file in the output tree it will find it in the source tree.

SCons: Get abspath of original file (as though I hadn't set variant_dir)

I can use File('foo.bar').abspath to get the location of a file, but if I've got variant_dir set then the returned path will be in variant_dir rather than it's original location. If I have duplicate=0 set, then the file returned won't actually exist.
Obviously SCons knows where the original file is, as it's passed as an argument when the file's actually built (eg gcc -c -o variant/foo.o orig/foo.c).
Is there some sort of File('foo.bar').origpath that I can use?
If it came to it I could use os.path.join(Dir('#').abspath, 'orig') but that requires the SConscript to know which directory it's in, which is messy.
You can use srcnode(). To quote the man page:
The srcnode() method returns another
File or Dir object representing the
source path of the given File or Dir.
This will give you the absolute path in the source directory:
File('foo.bar').srcnode().abspath

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