Floating point to ieee convertor in verilog - verilog

Question

I'm trying create a module that will convert 3.817 floating number or any number to its binary representation in IEEE 754 single precision format and writing a test bench to display the output.
I wrote the following code:
module float_to_ieee754_single_precision (
input wire [31:0] float, // input floating point number
output wire [31:0] ieee754_single_precision // output binary representation in IEEE 754 single precision format
);
// Declare variables to store the sign, exponent, and mantissa of the input floating point number
wire signed [31:31] sign;
wire signed [30:23] exponent;
wire [22:0] mantissa;
// Split the input floating point number into its sign, exponent, and mantissa parts
assign sign = float[31];
assign exponent = float[30:23];
assign mantissa = {float[22:0], 23'b0};
// Convert the exponent from excess-127 to 2's complement representation
wire signed [7:0] exponent_2s_complement = exponent - 127;
// Shift the mantissa to the right by the exponent value, adding an implicit leading 1 to the mantissa
wire [22:0] mantissa_normalized = mantissa >> exponent_2s_complement;
// Concatenate the sign, exponent, and mantissa to obtain the binary representation in IEEE 754 single precision format
assign ieee754_single_precision = {sign, exponent_2s_complement, mantissa_normalized};
endmodule
`timescale 1ns / 1ps
module float_to_ieee754_single_precision_tb;
// Declare input and output wires
wire [31:0] float;
wire [31:0] ieee754_single_precision;
// Instantiate the module under test
float_to_ieee754_single_precision dut (
.float(float),
.ieee754_single_precision(ieee754_single_precision)
);
// Declare a test vector with a floating point number and its expected binary representation in IEEE 754 single precision format
localparam test_vector [][2] = {
{32'h3F800000, 32'h3F800000}, // 1.0
{32'h3F8CCCCD, 32'h3F8CCCCD}, // 1.1
{32'hC3F8CCCD, 32'hBF8CCCCD}, // -1.1
{32'h40A00000, 32'h40A00000}, // 10.0
{32'hC2D60000, 32'hBE280000} // -0.1
};
// Iterate through the test vector and check the module output against the expected value
integer i;
initial begin
for (i = 0; i < 5; i = i + 1) begin
float = test_vector[i][0];
#1;
if (ieee754_single_precision != test_vector[i][1]) begin
$display("Test case %d failed:", i);
$display(" Expected output: %h", test_vector[i][1]);
$display(" Actual output: %h", ieee754_single_precision);
end
end
end
endmodule
I'm stuck on the same error and I don't know what to do.
The error are:
Error (10170): Verilog HDL syntax error at float_to_ieee754_single_precision.v(42) near text "]"; expecting an operand.
Error (10137): Verilog HDL Procedural Assignment error at floating_point_to_ieee754.v(53): object "float" on left-hand side of assignment must have a variable data type
Error (10560): Verilog HDL Expression error at floating_point_to_ieee754.v(53): indexed name specifies too many indices for array "test_vector"
Error (10560): Verilog HDL Expression error at floating_point_to_ieee754.v(55): indexed name specifies too many indices for array "test_vector"
Error (10560): Verilog HDL Expression error at floating_point_to_ieee754.v(57): indexed name specifies too many indices for array "test_vector"
Error: Quartus II 64-Bit Analysis & Synthesis was unsuccessful. 4 errors, 1 warning
Error: Peak virtual memory: 4655 megabytes
Error: Processing ended: Wed Dec 28 23:05:10 2022
Error: Elapsed time: 00:00:00
Error: Total CPU time (on all processors): 00:00:00
create a module that will convert 3.817 floating number or any number to its binary representation in IEEE 754 single precision format and writing a test bench to display the output and fix the errors!

Answer 1

The 1st error points to this line:
localparam test_vector [][2] = {
Change it to:
localparam bit [31:0] test_vector [5][2] = '{
Refer to IEEE Std 1800-2017, section 10.9.1 Array assignment patterns.
The 2nd error means that you need to declare float as a reg, not a wire since you assign to it in a procedural block (initial).
This code compiles without errors on 2 simulators:
module float_to_ieee754_single_precision_tb;
// Declare input and output wires
reg [31:0] float;
wire [31:0] ieee754_single_precision;
// Instantiate the module under test
float_to_ieee754_single_precision dut (
.float(float),
.ieee754_single_precision(ieee754_single_precision)
);
// Declare a test vector with a floating point number and its expected binary representation in IEEE 754 single precision format
localparam bit [31:0] test_vector [5][2] = '{
{32'h3F800000, 32'h3F800000}, // 1.0
{32'h3F8CCCCD, 32'h3F8CCCCD}, // 1.1
{32'hC3F8CCCD, 32'hBF8CCCCD}, // -1.1
{32'h40A00000, 32'h40A00000}, // 10.0
{32'hC2D60000, 32'hBE280000} // -0.1
};
// Iterate through the test vector and check the module output against the expected value
integer i;
initial begin
for (i = 0; i < 5; i = i + 1) begin
float = test_vector[i][0];
#1;
if (ieee754_single_precision != test_vector[i][1]) begin
$display("Test case %d failed:", i);
$display(" Expected output: %h", test_vector[i][1]);
$display(" Actual output: %h", ieee754_single_precision);
end
end
end
endmodule