Get the ID of the currently executing CPU on M1 - multithreading

Is there a way to get a unique ID for the core that is executing the current thread?
On OSX x86, the cpuid CPU instruction could be used but that doesn't work on Apple Silicon like the M1 which is based on ARMv8.

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Will update Ubuntu 22.04 kernel, with Alder Lake processor resolve parallelism problems , and without breaking my Nvidia drivers?

I recently bought a dell XPS 15 with a i9 12900 HK, and downloaded Ubuntu 22.04 LTS as an OS.
I coded a simple OpenMP program, that should have a linear speedup in the number of threads (the code is correct because it behaves as expected when I run it on a cluster), but on my laptop, it stops the speedup at 6 threads, even if my processor has 20 threads. I made some research, and read that kernel 5.15 is not optimised for last Intel processors because it makes a bad use of P and E cores.
But I also read that it may be dangerous to update the kernel to a newer version like 5.17 or 5.18 because my GTX 3050 Ti drivers may not be compatible with this kernel.
Can I update the kernel safely ? Will it resolves my parallelism problem? What method should I use to update my kernel?
I tried to look to forums and docs, but lots of available documentation are from third parties and I don't know if I can trust them.

Find table of interrupts for Linux or Windows?

I recently began study asm, and faced a problem, that i can't find table of all interrupt's for linux or win. I looked in intel documentation, but don't find this info. So, how do you find table of all interrupts?
In general, you canʼt find "table of all interrupts" without a real hardware start because it depends on ton of factors, including extension adapter set, exact chipset version, processor version, and so on.
Iʼd assume x86 as the context. It is defined by Intel that first 32 interrupt vectors (0-31) are for use by CPU itself - it can generate their invocation on internally defined exceptions. That would clash with old style (known from various IBM PC descriptions) that interrupts are assigned to 8-15, but, it is defined as OS task to reassign all conflicting interrupts when entering the protected mode. Then, interrupt controllers (nowadays, you can assume all them are at least APIC) are programmed to assign interrupt numbers of remained set to hardware that requires them. What numbers are assignable, depends on bus type and delivery manner:
MSI (message signaled interrupt), MSI-X - the main techniques for PCI-E - are assigned by APIC programming, typically one number per device and role (some devices will emit multiple interrupt types);
old line-based style (classic PCI) - up to 4 interrupt lines per bus; so there may be collision between numbers, and handlers shall iterate all possible devices. In classic designs of Pentium 1-3 times, they were assigned by BIOS to range 10-14 and then moved by OS to some upper range.
At the system I write this, interrupt numbers assigned to hardware are 36-62 with some gaps. 17 of them are used by xhci_hcd.
To sum up: for CPU interrupts, read the CPU doc. For others, assume dynamic assignment and find the current assignment in OS state using respective API.
So, i wrote code for windows and thought, that linux has table or list with interrupt. But I was surprised when learned, that linux has only one interrupt (int 80h) and many syscalls. So, i can look syscalls here
https://man7.org/linux/man-pages/man2/syscalls.2.html
https://chromium.googlesource.com/chromiumos/docs/+/master/constants/syscalls.md
Also syscalls division by type of processor and architecture of OS (x32 or x64). So, i should be use syscall and only one interrupt - int 80h.
I understood this and now I want to help others

How does risc-v c emulator works?

I'm running a Linux virtual machine based on x86.
and I'm doing cross-compilation(target : RISC-V) with RISC-V compiler and emulator.
I want to know how RISC-V emulator(C file) emulates RISC-V instructions without a real RISC-V cpu.
A CPU simulator is a program that takes as input a binary executable file and performs the same steps to execute it that a native CPU does. In the RISC-V case, it fetches the memory pointed at by the Program Counter (PC), and decodes the 32-bit word according to the RISC-V instruction set specification. Next, depending on which instruction it is (load, store, register operation) it performs that operation in software, then increments the PC (or sets it, if the instruction is a jump or return), and fetches the next instruction to execute. The registers and memory in the simulated CPU are just arrays of 32-bit (or 64-bit for RISC-V 64) integers in the simulator.
If you're curious about how a CPU works, writing a basic simulator for one is a fun (and instructive!) exercise. You can write a CPU simulator in any programming language.

How to measure total boottime for linux kernel on intel rangeley board

I am working on intel rangeley board. I want to measure the total time taken to boot the linux kernel. Is there any possible and proven way to achieve this on intel board?
Try using rdtsc. According to the Intel insn ref manual:
The processor monotonically increments the time-stamp counter MSR
every clock cycle and resets it to 0 whenever the processor is reset.
See “Time Stamp Counter” in Chapter 17 of the Intel® 64 and IA-32
Architectures Software Developer’s Manual, Volume 3B, for specific
details of the time stamp counter behavior.
(see the x86 tag wiki for links to manuals)
Normally the TSC is only used for relative measurements between two points in time, or as a timesource. The absolute value is apparently meaningful. It ticks at the CPU's rated clock speed, regardless of the power-saving clock speed it's actually running at.
You might need to make sure you read the TSC from the boot CPU on a multicore system. The other cores might not have started their TSCs until Linux sent them an inter-processor interrupt to start them up. Linux might sync their TSCs to the boot CPU's TSC, since gettimeofday() does use the TSC. IDK, I'm just writing down stuff I'd be sure to check on if I wanted to do this myself.
You may need to take precautions to avoid having the kernel modify the TSC when using it as a timesource. Probably via a boot option that forces Linux to use a different timesource.

Why the preempt_count is not the per cpu variable in old version linux kernel like 2.6.33

I have question about the preemptive_count in the old linux kernel (e.g. 2.6.33)
#define preempt_count() (current_thread_info()->preempt_count)
all the related field in this variable is about the CPU related info, why the kernel does not using a cpu based variable?

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