Where can I find I/O address range of BIOS? - memory-address

I have been reading this chipset datasheet for a while, looking for the BIOS I/O address range, but I haven't found it.
Where can I find the BIOS address range? Is it on this datashhet or should I look in other place?

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How to map a specific physical address range of linux kernel, of size less than one page size(4Kb) to user space

I am working on a solution similar to user-space input/output drivers(Linux kernel UIO).
Linux kernel UIO
I intend to map a specific physical address range(starting at specific physical address) from kernel space to user-space of size 0x100, which is less than one page size(4 Kb). I tried to solve this via kernel UIO framework but it maps(via mmap file operation of file /dev/uio) minimum for one page. I want a solution so that I can map exact specific 0x100 physical memory to user-space. If the user-space tries to access beyond that 0x100 range, it should not be allowed. So far the solution I came across deal in page level mappings.

Is masking physical address of DMA allocated memory valid?

I'm currently programming a Linux Kernel driver, which needs to tell a FPGA a base address in RAM to write to.
The memory is allocated in the kernel driver with dma_alloc_coherent.
This will generate a 32 bit physical address and a kernel virtual address, the physical address is being passed to the FPGA.
The FPGA is a Cyclone V with embedded ARM Cortex-A9, on which an embedded Linux with the driver is running.
The problem now is, that the FPGA fabric only generates a 27 bit wide bus to address the sdram, while the physical address, that is being generated by the dma call has 32 bits, e.g. th physical address has been 0x2f220000, which exceeds 27 bit span.
I want to know, if it is okay to mask the most significant 5 bits and tell the FPGA the address 0x7220000 and still have the correct behaviour (In doc it is stated, that the physical address shall be casted to buswidth, that would mean masking, because I can't use 27 bit in processor).
Also is it okay to access the DMA memory with a simple memcpy command, that copies from the kernel virtual address to a buffer?
Thanks in advance.
The answer truly depends on the physical memory layout of your device. If the address bus of the FPGA complements the missing bits so that the actual address resolves to the correct memory, then masking is, probably, okay. If not, then it is possible that the memory that the Linux kernel returned to you is simply in accessible to the FPGA. If that's the case, you will have to find a way to ask Linux to only give you buffers from memory that is accessible.

How does the kernel set register cr3?

I understand that the mmu of the processor uses register cr3 to translate linear addresses into physical ones, provided that cr3 is properly set to the physical address of the page directory. But after the kernel has allocated the page tables, how would it find the physical address of the tables and set cr3 to it?
EDIT: I'm talking about the linux kernel.
I'm going to assume that what's bugging you is this: assuming that (once switching to protected mode) the kernel only ever writes to virtual addresses, then this means that it writes the page tables it creates (e.g. for new processes) into virtual addresses. But since the kernel must put a physical address into cr3, then how can it convert the virtual address of the page tables into a physical one?
The short answer is basically what Margaret said: the page tables are found in kernel address space and the kernel keeps a close track of the virtual->physical mapping there.
To flesh this out a little bit more, Linux differentiates between two types of virtual addresses in the kernel:
Kernel virtual addresses - which can map (conceptually) to any physical address; and
Kernel logical addresses - which are virtual addresses that have a linear mapping to physical addresses
The kernel places the page tables in logical addresses, so you only need to focus on those for this discussion.
Mapping a logical address to its corresponding physical one requires only the subtraction of a constant (see e.g. the __pa macro in the Linux source code).
For example, on x86, physical address 0 corresponds to logical address 0xC0000000, and physical address 0x8000 corresponds to logical address 0xC0008000.
So once the kernel places the page tables in a particular logical address, it can easily calculate which physical address it corresponds to.
For further details, you can read the relevant Linux Device Drivers chapter.

Limiting the heap area's Virtual address range

I need to do some brute-force searching in process VA space for my study and hence would like limit my heap area's virtual address range. OS course told me that heap is anywhere between data and stack pages. So I want to shrink my process VA range by doing the following:
Have a custom linker script that gave start and end of data somewhere very high in address range (0x7f45f88a6000)
Tweak fs/binfmt_elf.c to have stack top as (0x8f45f88a6000) instead of randomly picking.
Assume my program uses only mmap with NULL as addresses
Can I safely assume that my heap(brk) will be between this address range. Also can I assume all mmap(NULL, other args) calls will return between this address range?
If not what is the fix for this? I am willing to change kernel source code, but where?

how does gpio_request deal with the GPIO number to virtual memory address on Linux?

There is a problem that gpio_request need a GPIO number, but in the kernel it needs a address to deal with the gpio, how does the Linux achieve this?
Alway in the chip spec, such as MSM8x60 or whatever SOC chip Spec, there is a memory map shows which memory area is for GPIO. But in kernel driver, we use gpio number to access the gpio.
My question is:
1, Does the memory address in the memory map of chip spec is physical address?
2, In the kernel, it uses virtual address, how does the kernel convert a gpio number to virtual address?
Thank you!
Kind Regards
Bill Wang
Normally, on the embedded system, there is a address map of the whole address, which address is virtual.
when use the gpio port number, the related GPIO driver or such things can convert the gpio port number to the virtual address, and the MMU will located to the physical address.

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