Generally flag mismatch is for driver A vs Driver B. Could you give some pointers to solve. We are using imx6ul board.
What is the way to debug this.
I have checked others driver as well and none of them is registering irq 32.
It looks like we are registering same driver twice.
Erorr:
[ 7.315153] input: 20cc000.snvs:snvs-powerkey as /devices/soc0/soc/2000000.aips-bus/20cc000.snvs/20cc000.snvs:snvs-powerkey/input/input0
[ 7.332058] genirq: Flags mismatch irq 32. 00000004 (20cc000.snvs:snvs-powerkey) vs. 00000004 (20cc000.snvs:snvs-powerkey)
[ 7.343879] snvs_pwrkey 20cc000.snvs:snvs-powerkey: interrupt not available.
[ 7.366705] snvs_pwrkey: probe of 20cc000.snvs:snvs-powerkey failed with error -16
[ 7.394971] snvs_rtc 20cc000.snvs:snvs-rtc-lp: registered as rtc0
DTS
snvs: snvs#020cc000 {
compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
reg = <0x020cc000 0x4000>;
snvs_rtc: snvs-rtc-lp {
compatible = "fsl,sec-v4.0-mon-rtc-lp";
regmap = <&snvs>;
offset = <0x34>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
};
snvs_poweroff: snvs-poweroff {
compatible = "syscon-poweroff";
regmap = <&snvs>;
offset = <0x38>;
value = <0x61>;
mask = <0x61>;
status = "disabled";
};
snvs_pwrkey: snvs-powerkey {
compatible = "fsl,sec-v4.0-pwrkey";
regmap = <&snvs>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
linux,keycode = <KEY_POWER>;
wakeup-source;
};
};
Related
ERROR SHOW:
[ 156.303744] blinkled: loading out-of-tree module taints kernel.
[ 156.303871] blinkled: module verification failed: signature and/or required key missing - tainting kernel
[ 156.304614] Good ! device probed! 65
[ 156.304644] demo_file 1c20800.gpioa7: can't request region for resource [mem 0x01c20800-0x01c20aff]
[ 156.304663] demo_file: probe of 1c20800.gpioa7 failed with error -16
[ 156.304747] The blinkled driver is success
MY CODE DEVICETREE:
gpioa7: gpioa7#1c20800{
reg = < 0x1c20800 0x300 >;
clocks = < 0x03 0x36 0x12 0x13 0x00 >;
clock-names = "apb\0hosc\0losc";
gpio-controller;
#gpio-cells = < 0x03 >;
gpios = < 0x0c 0x07 0x01 0x04 >;
input;
interrupt-controller;
#interrupt-cells = < 0x03 >;
interrupt-parent = < 0x01 >;
interrupts = < 0x01 0x00 0x48 0x08 >;
compatible = "gpio,input-pa7-pin";
status = "okay";
};
Think error is caused because dts has 2 nodes with same address:
soc {
pinctrl#1c20800 {
......
};
};
But i don't know how to fix it? Thanks!
I wanted to write a simple PCI express driver for Xilinx FPGA. But I am not able to request memory region for PCI.
Question is: How to claim that I/O memory area for custom driver. I want to write 3. byte of that area using driver.
Below are the details. What am I missing ? Thanks
1-) I am getting this error:
[ 4.345350] Unable to handle kernel paging request for data at address 0x00000005
[ 4.353978] Faulting instruction address: 0x80000000002c9370
[ 4.358337] Oops: Kernel access of bad area, sig: 11 [#1]
[ 4.362426] BE SMP NR_CPUS=24 CoreNet Generic
[ 4.365477] Modules linked in: fpgapcie(O+) ucc_uart
[ 4.369139] CPU: 0 PID: 1999 Comm: udevd Tainted: G O 4.19.26+gc0c2141 #1
[ 4.375924] NIP: 80000000002c9370 LR: 80000000002c9350 CTR: c00000000053acfc
[ 4.381753] REGS: c0000001ee2bb1c0 TRAP: 0300 Tainted: G O (4.19.26+gc0c2141)
[ 4.389146] MSR: 000000008002b000 <CE,EE,FP,ME> CR: 22228242 XER: 20000000
[ 4.394982] DEAR: 0000000000000005 ESR: 0000000000800000 IRQMASK: 0
GPR00: 80000000002c9350 c0000001ee2bb440 80000000002d1f00 000000000000001a
GPR04: 0000000000000001 000000000000022d c000000000f30548 c000000001013000
GPR08: 00000001fec37000 0000000000000003 0000000000000000 0000000000000020
GPR12: 0000000028228444 c000000001013000 0000000000020000 000000013c323ac8
GPR16: 000000013c323ae0 80000000002cc000 c000000000a194b0 c0000001f0eaa1c0
GPR20: 00000000006000c0 c000000000ed9da0 0000000000000000 0000000000000100
GPR24: 000000000000001c 000000000f700000 c0000001f3034880 0000000000000000
GPR28: c0000001f337b800 00000000000000f7 c0000001f337b8a0 0000000000000000
2-) Code piece in PCI probe function:
static int pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
{
int ret, minor;
struct cdev *cdev;
dev_t devno;
unsigned long pci_io_addr = 0;
/* add this pci device in pci_cdev */
if ((minor = pci_cdev_add(pci_cdev, MAX_DEVICE, dev)) < 0)
goto error;
/* compute major/minor number */
devno = MKDEV(major, minor);
/* allocate struct cdev */
cdev = cdev_alloc();
/* initialise struct cde
cdev_init(cdev, &pci_ops);
cdev->owner = THIS_MODULE;
/* register cdev */
ret = cdev_add(cdev, devno, 1);
if (ret < 0) {
dev_err(&(dev->dev), "Can't register character device\n");
goto error;
}
pci_cdev[minor].cdev = cdev;
dev_info(&(dev->dev), "%s The major device number is %d (%d).\n",
"Registeration is a success", MAJOR(devno), MINOR(devno));
dev_info(&(dev->dev), "If you want to talk to the device driver,\n");
dev_info(&(dev->dev), "you'll have to create a device file. \n");
dev_info(&(dev->dev), "We suggest you use:\n");
dev_info(&(dev->dev), "mknod %s c %d %d\n", DEVICE_NAME, MAJOR(devno), MINOR(devno));
dev_info(&(dev->dev), "The device file name is important, because\n");
dev_info(&(dev->dev), "the ioctl program assumes that's the\n");
dev_info(&(dev->dev), "file you'll use.\n");
/* enable the device */
pci_enable_device(dev);
/* 'alloc' IO to talk with the card */
if (pci_request_region(dev, BAR_IO, "IO-pci") == 0) {
printk(KERN_ALERT "The memory you requested from fpgapcie is already reserved by CORE pci driver.");
}
check that BAR_IO is *really* IO region
if ((pci_resource_flags(dev, BAR_IO) & IORESOURCE_IO) != IORESOURCE_IO) {
dev_err(&(dev->dev), "BAR2 isn't an IO region\n");
cdev_del(cdev);
goto error;
}
pci_io_addr = pci_resource_start(dev,BAR_IO);
printk(KERN_INFO "PCI start adress: %02X", &pci_io_addr);
outb(pci_io_addr+3, 5);
printk(KERN_INFO "Message from PCI device to user: 5");
return 1;
error:
printk(KERN_INFO "An error occuder while probing pci");
return 0;
}
3-) lspci -v output:
0001:01:00.0 Memory controller: Xilinx Corporation Device 7021
Subsystem: Xilinx Corporation Device 0007
Flags: bus master, fast devsel, latency 0, IRQ 41
Memory at c10000000 (32-bit, non-prefetchable) [size=2K]
Capabilities: [40] Power Management version 3
Capabilities: [48] MSI: Enable- Count=1/1 Maskable- 64bit+
Capabilities: [60] Express Endpoint, MSI 00
Capabilities: [100] Device Serial Number 00-00-00-01-01-00-0a-35
Kernel driver in use: yusufpci
Kernel modules: fpgapcie
4-) full dmesg:
[ 4.285663] Module pci init
[ 4.294787] yusufpci 0001:01:00.0: Registeration is a success The major device number is 247 (0).
[ 4.302367] yusufpci 0001:01:00.0: If you want to talk to the device driver,
[ 4.308116] yusufpci 0001:01:00.0: you'll have to create a device file.
[ 4.313516] yusufpci 0001:01:00.0: We suggest you use:
[ 4.317354] yusufpci 0001:01:00.0: mknod virtual_pci c 247 0
[ 4.321713] yusufpci 0001:01:00.0: The device file name is important, because
[ 4.327553] yusufpci 0001:01:00.0: the ioctl program assumes that's the
[ 4.332866] yusufpci 0001:01:00.0: file you'll use.
[ 4.336459] The memory you requested from fpgapcie is already reserved by CORE pci driver. This is not an error.
[ 4.336463] PCI start adress: EE2BB4B0
[ 4.345350] Unable to handle kernel paging request for data at address 0x00000005
[ 4.353978] Faulting instruction address: 0x80000000002c9370
[ 4.358337] Oops: Kernel access of bad area, sig: 11 [#1]
[ 4.362426] BE SMP NR_CPUS=24 CoreNet Generic
[ 4.365477] Modules linked in: fpgapcie(O+) ucc_uart
[ 4.369139] CPU: 0 PID: 1999 Comm: udevd Tainted: G O 4.19.26+gc0c2141 #1
[ 4.375924] NIP: 80000000002c9370 LR: 80000000002c9350 CTR: c00000000053acfc
[ 4.381753] REGS: c0000001ee2bb1c0 TRAP: 0300 Tainted: G O (4.19.26+gc0c2141)
[ 4.389146] MSR: 000000008002b000 <CE,EE,FP,ME> CR: 22228242 XER: 20000000
[ 4.394982] DEAR: 0000000000000005 ESR: 0000000000800000 IRQMASK: 0
GPR00: 80000000002c9350 c0000001ee2bb440 80000000002d1f00 000000000000001a
GPR04: 0000000000000001 000000000000022d c000000000f30548 c000000001013000
GPR08: 00000001fec37000 0000000000000003 0000000000000000 0000000000000020
GPR12: 0000000028228444 c000000001013000 0000000000020000 000000013c323ac8
GPR16: 000000013c323ae0 80000000002cc000 c000000000a194b0 c0000001f0eaa1c0
GPR20: 00000000006000c0 c000000000ed9da0 0000000000000000 0000000000000100
GPR24: 000000000000001c 000000000f700000 c0000001f3034880 0000000000000000
GPR28: c0000001f337b800 00000000000000f7 c0000001f337b8a0 0000000000000000
[ 4.453632] NIP [80000000002c9370] .pci_probe+0x220/0x2b4 [fpgapcie]
[ 4.458680] LR [80000000002c9350] .pci_probe+0x200/0x2b4 [fpgapcie]
[ 4.463639] Call Trace:
[ 4.464775] [c0000001ee2bb440] [80000000002c9350] .pci_probe+0x200/0x2b4 [fpgapcie] (unreliable)
[ 4.472262] [c0000001ee2bb500] [c0000000004b77c8] .pci_device_probe+0x11c/0x1f4
[ 4.478270] [c0000001ee2bb5a0] [c000000000561ebc] .really_probe+0x26c/0x38c
[ 4.483927] [c0000001ee2bb640] [c0000000005621ac] .driver_probe_device+0x78/0x154
[ 4.490106] [c0000001ee2bb6d0] [c0000000005623d8] .__driver_attach+0x150/0x154
[ 4.496025] [c0000001ee2bb760] [c00000000055f424] .bus_for_each_dev+0x94/0xdc
[ 4.501856] [c0000001ee2bb800] [c0000000005615fc] .driver_attach+0x24/0x38
[ 4.507426] [c0000001ee2bb870] [c000000000560ec8] .bus_add_driver+0x264/0x2a4
[ 4.513258] [c0000001ee2bb910] [c000000000563384] .driver_register+0x88/0x178
[ 4.519089] [c0000001ee2bb990] [c0000000004b5a68] .__pci_register_driver+0x50/0x64
[ 4.525355] [c0000001ee2bba00] [80000000002c9564] .pci_init_module+0xc0/0x444 [fpgapcie]
[ 4.532144] [c0000001ee2bba80] [c0000000000020b4] .do_one_initcall+0x64/0x224
[ 4.537978] [c0000001ee2bbb50] [c0000000000f443c] .do_init_module+0x70/0x260
[ 4.543722] [c0000001ee2bbbf0] [c0000000000f6564] .load_module+0x1e6c/0x2400
[ 4.549467] [c0000001ee2bbd10] [c0000000000f6d28] .__se_sys_finit_module+0xcc/0x100
[ 4.555819] [c0000001ee2bbe30] [c0000000000006b0] system_call+0x60/0x6c
[ 4.561127] Instruction dump:
[ 4.562785] e86a8080 38810070 f9210070 4800041d e8410028 e9210070 3d420000 e94a8088
[ 4.569231] 39290003 5529063e e94a0000 7c0004ac <992a0005> 39200001 3d420000 992d0684
[ 4.575854] ---[ end trace 2d15cff7ba1b3255 ]---
Problem solved. But when I write the third byte of Memory Mapped area, FPGA programmed to answer with lighting its GPIO leds. I tried to write first 15 byte of MMIO but it did not work. The leds did not lighted. But the code stopped giving errors.
I also cannot read the bytes on MMIO space using readb() function. It's
giving
unrecoverable machine check error
Problem solved using this code.
pci_request_regions(dev, "fpgapcie");
pci_io_startaddr = pci_resource_start(dev,BAR_IO);
pci_io_endaddr = pci_resource_end(dev,BAR_IO);
pci_io_size = pci_resource_len(dev,BAR_IO);
printk(KERN_INFO "Region start: %lX, Region end: %lX, Size: % lX",pci_io_startaddr,pci_io_endaddr,pci_io_size);
pci_io_addr = ioremap(pci_io_startaddr, pci_io_endaddr);
printk(KERN_INFO "PCI start adress: %lX", pci_io_addr);
for(i = 0;i<15;i++) /* Write first 15 byte */
{
writeb(2, pci_io_addr+i);
printk(KERN_INFO "%lX, Message from PCI device to user: 2", pci_io_addr+i);
}
and the dmesg output:
fpgapcie: loading out-of-tree module taints kernel.
fpgapcie 0001:01:00.0: Registeration is a success The major device number is 247 (0).
fpgapcie 0001:01:00.0: If you want to talk to the device driver,
fsl-fman-port ffe488000.port fm1-gb0: renamed from eth0
fpgapcie 0001:01:00.0: you'll have to create a device file.
fpgapcie 0001:01:00.0: We suggest you use:
fpgapcie 0001:01:00.0: mknod virtual_pci c 247 0
fpgapcie 0001:01:00.0: The device file name is important, because
fpgapcie 0001:01:00.0: the ioctl program assumes that's the
fpgapcie 0001:01:00.0: file you'll use.
Region start: 210000000, Region end: 2100007FF, Size: 800
PCI start adress: 8000080088900000
8000080088900000, Message from PCI device to user: 2
8000080088900001, Message from PCI device to user: 2
8000080088900002, Message from PCI device to user: 2
8000080088900003, Message from PCI device to user: 2
8000080088900004, Message from PCI device to user: 2
8000080088900005, Message from PCI device to user: 2
8000080088900006, Message from PCI device to user: 2
8000080088900007, Message from PCI device to user: 2
8000080088900008, Message from PCI device to user: 2
8000080088900009, Message from PCI device to user: 2
800008008890000A, Message from PCI device to user: 2
800008008890000B, Message from PCI device to user: 2
800008008890000C, Message from PCI device to user: 2
800008008890000D, Message from PCI device to user: 2
800008008890000E, Message from PCI device to user: 2
I'm trying to configure my serial port (/dev/ttyS0) to automatically control RTS pin. I already can do it from user space by ioctl TIOCM_RTS flag toggling but it's too slow in my case - slave device respond too fast and I miss it.
I tried to achieve it by enabling RS485 mode but I end with bellow error:
unable to set IOCTL:: Inappropriate ioctl for device
My implementation
port_fd = open(port.c_str(), O_RDWR);
if (port_fd != -1) {
struct serial_rs485 rs485conf={0};
rs485conf.flags |= SER_RS485_ENABLED;
rs485conf.flags |= SER_RS485_RTS_ON_SEND;
rs485conf.delay_rts_before_send = 0;
int rv = ioctl(port_fd,TIOCSRS485, &rs485conf);
if(rv){
printf("rv = %d\n", rv);
perror("unable to set IOCTL:");
}
dmesq output:
[ 0.000000] console [tty0] enabled
[ 1.338716] 00:01: ttyS0 at I/O 0x3f8 (irq = 4, base_baud = 115200) is a 16550A
[ 1.359441] 00:02: ttyS1 at I/O 0x2f8 (irq = 3, base_baud = 115200) is a 16550A
[ 1.380168] 00:03: ttyS2 at I/O 0x3e8 (irq = 7, base_baud = 115200) is a 16550A
[ 1.400953] 00:04: ttyS3 at I/O 0x2e8 (irq = 7, base_baud = 115200) is a 16550A
[ 1.421677] 00:05: ttyS4 at I/O 0x2f0 (irq = 7, base_baud = 115200) is a 16550A
[ 1.442338] 00:06: ttyS5 at I/O 0x2e0 (irq = 7, base_baud = 115200) is a 16550A
How can I force my serial port to work in this mode or maybe there is another way to achieve RTS automatic control?
OS:
4.15.0-23-generic #25-Ubuntu SMP Wed May 23 18:02:16 UTC 2018 x86_64 x86_64 x86_64 GNU/Linux
I am running the example as root http://mythopoeic.org/BBB-PRU/pru-helloworld/example.c
and I receive the Error:
"prussdrv_open() failed with -1" during the execution
BBB has Debian 4.1
These are the commands used:
sudo cp EBB-PRU-Example‐00A0.dtbo /lib/firmware
echo EBB-PRU-Example > /sys/devices/platform/bone_capemgr/slots
cat /sys/devices/platform/bone_capemgr/slots
0: PF---- -1
1: PF---- -1
2: PF---- -1
3: PF---- -1
4: P-O-L- 0 Override Board Name,00A0,Override Manuf,EBB-PRU-Example
modprobe uio_pruss
dmesg
[ 195.985512] bone_capemgr bone_capemgr: part_number 'EBB-PRU-Example', version 'N/A'
[ 195.994182] bone_capemgr bone_capemgr: slot #4: override
[ 195.999703] bone_capemgr bone_capemgr: Using override eeprom data at slot 4
[ 196.006752] bone_capemgr bone_capemgr: slot #4: 'Override Board Name,00A0,Override Manuf,EBB-PRU-Example'
[ 196.039095] pruss_uio 4a300000.pruss: No children
[ 196.057144] gpio-of-helper ocp:gpio_helper: ready
[ 196.070956] bone_capemgr bone_capemgr: slot #4: dtbo 'EBB-PRU-Example-00A0.dtbo' loaded; overlay id #0
and
/boot/uEnv.txt has disabled the HDMI
EBB-PRU-Example.dts
/* Device Tree Overlay for enabling the pins that are used in Chapter 13
* This overlay is based on the BB-PRU-01 overlay
* Written by Derek Molloy for the book "Exploring BeagleBone: Tools and
* Techniques for Building with Embedded Linux" by John Wiley & Sons, 2014
* ISBN 9781118935125. Please see the file README.md in the repository root
* directory for copyright and GNU GPLv3 license information.
*/
/dts-v1/;
/plugin/;
/ {
compatible = "ti,beaglebone", "ti,beaglebone-black";
part-number = "EBB-PRU-Example";
version = "00A0";
/* This overlay uses the following resources */
exclusive-use =
"P9.11", "P9.13", "P9.27", "P9.28", "pru0";
fragment#0 {
target = <&am33xx_pinmux>;
__overlay__ {
gpio_pins: pinmux_gpio_pins { // The GPIO pins
pinctrl-single,pins = <
0x070 0x07 // P9_11 MODE7 | OUTPUT | GPIO pull-down
0x074 0x27 // P9_13 MODE7 | INPUT | GPIO pull-down
>;
};
pru_pru_pins: pinmux_pru_pru_pins { // The PRU pin modes
pinctrl-single,pins = <
0x1a4 0x05 // P9_27 pr1_pru0_pru_r30_5, MODE5 | OUTPUT | PRU
0x19c 0x26 // P9_28 pr1_pru0_pru_r31_3, MODE6 | INPUT | PRU
>;
};
};
};
fragment#1 { // Enable the PRUSS
target = <&pruss>;
__overlay__ {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pru_pru_pins>;
};
};
fragment#2 { // Enable the GPIOs
target = <&ocp>;
__overlay__ {
gpio_helper {
compatible = "gpio-of-helper";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&gpio_pins>;
};
};
};
};
There are two pre compiled versions of the 4.1 kernel for the BBB in the repos: The "TI" version and the "Bone" version. The TI version uses a newer API for controlling the PRU and the Bone version has the same API as the 3.8 kernel and the prussdrv_open() function should work fine.
To install the 4.1 "bone" kernel, you can do:
cd /opt/scripts/tools
sudo ./update_kernel.sh --bone-rt-kernel --lts-4_1
More info: https://groups.google.com/forum/#!topic/beagleboard/cyM3f935wMA
Hmmm looks similar to a previous issue.. The problem was that the PRU was not enabled, and I quote :
echo BB-BONE-PRU-01 > /sys/devices/bone_capemgr.8/slots fixed it.
You could try to use the 4.1.5-ti-r10 version of the kernel. Apparently pruss_uio does not work for some 4.1.x kernels.
Moreover, the dts file you are using was not working for me either (don't know why). I used the following, and prussdrv_open does not fail:
/dts-v1/;
/plugin/;
/ {
compatible = "ti,beaglebone", "ti,beaglebone-black";
/* identification */
part-number = "BB-ENABLE-PRU";
/* version */
version = "00A0";
fragment#1 { // Enable the PRUSS
target = <&pruss>;
__overlay__ {
status = "okay";
};
};
};
If found all this out on that thread: https://groups.google.com/forum/#!category-topic/beagleboard/VBNEoCbEHUQ
I'm working with a BeagleBone Black and trying to get bonescript running. I'm running Debian Wheezy with the latest updates and the latest versions of node v0.10.21 and bonescript 0.2.4. I'm able to blink the internal LED, so I'm fairly certain my installation is working fine. My problem is that I'm unable to control any of the P8 or P9 gpios. Using the examples on the bonescript website I'm running the following script. I'm not sure exactly what this error means so even if someone can point me into the right direction I would appreciate it.
Thank you
Scottt
=============================================
var b = require('bonescript');
var led = "P8_3";
var state = 0;
b.pinMode(led, b.output);
toggleLED = function() {
state = state ? 0 : 1;
b.digitalWrite(led, state);
};
timer = setInterval(toggleLED, 100);
stopTimer = function() {
clearInterval(timer);
};
setTimeout(stopTimer, 30000);
=====================================================
I turned on bonescript debugging and get the following output regarding being unable to find the devicetree fragment.
root#debian-armhf:/usr/lib/node_modules/bonescript# nodejs blinkext.js
debug: cpuinfo = processor : 0
model name : ARMv7 Processor rev 2 (v7l)
BogoMIPS : 660.76
Features : swp half thumb fastmult vfp edsp thumbee neon vfpv3 tls
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x3
CPU part : 0xc08
CPU revision : 2
Hardware : Generic AM33XX (Flattened Device Tree)
Revision : 0000
Serial : 0000000000000000
debug: index.js loaded
debug: pinMode(P8_3,,,,);
debug: templateFilename = /usr/lib/node_modules/bonescript/bspm_template.dts
debug: fragment = bspm_P8_3_2f
debug: command = dtc -O dtb -o /lib/firmware/bspm_P8_3_2f-00A0.dtbo -b 0 -# /lib/firmware/bspm_P8_3_2f-00A0.dts
error: Failed to find devicetree fragment: bspm_P8_3_2f
info: 0: 54:PF---
1: 55:PF---
2: 56:PF---
3: 57:PF---
4: ff:P-O-L Bone-LT-eMMC-2G,00A0,Texas Instrument,BB-BONE-EMMC-2G
5: ff:P-O-L Bone-Black-HDMI,00A0,Texas Instrument,BB-BONELT-HDMI
debug: Unable to configure mux for pin [object Object]: Error loading devicetree overlay for P8_3 using template bspm
debug: getPinMode(P8_3);
debug: getPinMode(P8_3): Error: ENOENT, no such file or directory '/sys/kernel/debug/pinctrl/44e10800.pinmux/pins'
debug: pinMode: mode = {"pin":"P8_3","name":"GPIO1_6","options":["gpmc_ad6","mmc1_dat6","NA","NA","NA","NA","NA","gpio1_6"],"gpio":{"allocated":false}}
debug: getPinMode(P8_3);
debug: getPinMode(P8_3): Error: ENOENT, no such file or directory '/sys/kernel/debug/pinctrl/44e10800.pinmux/pins'
info: Error loading devicetree overlay for P8_3 using template bspm
=======================================================
Here is what I believe is the overlay template bonescript creates.
/*
* This is a template-generated file from BoneScript
*/
/dts-v1/;
/plugin/;
/{
compatible = "ti,beaglebone", "ti,beaglebone-black";
part_number = "BS_PINMODE_P8_3_0x2f";
version = "00A0";
exclusive-use =
"P8.3",
"gpio1_6";
fragment#0 {
target = <&am33xx_pinmux>;
__overlay__ {
bs_pinmode_P8_3_0x2f: pinmux_bs_pinmode_P8_3_0x2f {
pinctrl-single,pins = <0x018 0x2f>;
};
};
};
fragment#1 {
target = <&ocp>;
__overlay__ {
bs_pinmode_P8_3_0x2f_pinmux {
compatible = "bone-pinmux-helper";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&bs_pinmode_P8_3_0x2f>;
target = <&am33xx_pinmux>;
__overlay__ {
bs_pinmode_P8_3_0x2f: pinmux_bs_pinmode_P8_3_0x2f {
pinctrl-single,pins = <0x018 0x2f>;
};
};
};
fragment#1 {
target = <&ocp>;
__overlay__ {
bs_pinmode_P8_3_0x2f_pinmux {
compatible = "bone-pinmux-helper";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&bs_pinmode_P8_3_0x2f>;
};
};
};
};
We have forked bonescript and released new package. We faced same error and now solved everything by re-writing lot of code in original bonescript. You can install and use in your projects. https://www.npmjs.org/package/octalbonescript