Zynq, Yocto Linux and Custom FPGA IP Block Workflow - linux

Question

I'm new to the Zynq devices and also to linux and the Yocto project.
I now have a project where I need to implement a custom FPGA IP block and use it from a yocto generated linux distribution.
Obviously I will have to write the linux drivers for that custom IP. But I'm not able to find a clear explanation how the workflow for such a project may look like.
I found some old tutorials but I'm not sure if they are still the way to go, so an up-to-date best practice workflow would be great.
What I did so far:
I created a test project in Vivado and created a small led example by passing through the FPGA block in a Microzed + carrier board.
Then I exported the HW from Vivado to get a BSP package I tested in a bare metal project with Vitis.
I installed Yocto and I build a reference distro for my microzed board with just a serial interface by following a tutorial online.All this comes more or less pre-backed from Xilinx.
But now I need to use a Yocto generated linux distro and enable it to use my custom (LED) IP.
My questions:
How does a detailed workflow in this case look like (at the end I
need a bootable SD card)?
More in detail:
How can I bring the mydevice_bsp generated from Vivado into the Yocto distro?
In which environment(how to write them i'll find out my self) do I write the
drivers for the yocto Linux and bring them into the distro?
How do I load the bitstream into the FPGA fabric when the Linux image has booted up?
Unfortunately I do not have to much time to get all this working, so it would be really cool to find a step by step tutorial from the start to the end.
Thanks in advance for your help.
Regards
Martin

Answer 1

I´m not sure if someone has written down a workflow for this, but I can tell you how I would handle it.
Create your IP code as hardware and use the IP packager to pack the code. You can also add some driver code too, so the SDK can use this to automatic generate the drivers. So you can use the regular workflow in Vitis to write your software.
Or you skip this part and use the hardware direct in your Linux. So you will create an IP core and add him to your system in Vivado. Export the hardware to get your BSP file. Then you need the Xilinx Device Tree Generator to generate your device tree. This tool uses some basic definitions (like the base adress) of your IP core to generate the device tree part for your hardware.
Then you create a normal bitstream and a bunch of tools to create your bootloader, kernel, device tree, bitstream file, etc. (all without Yocto). Copy all files to a SD card and boot up your device. You can take a look at my Linux project and the Wiki when you need some help. Now you can begin to write the driver for your device and test him on your real hardware. At last you can create a Yocto recipe to automatic include your driver to the kernel with KConfig.
After booting Linux you find a device /dev/devcfg which can be used to reprogram the FPGA. Please note that changing the FPGA with impact on the processing system (i. e. you add some interfaces to your PS) will cause in some errors (maybe that bug is gone over the last years, but I have to issue this problem a few years ago).
So according to your LED example you have to do the following steps:
Create the IP core
Create a basic processing system and add the IP core
Generate the bitstream
Export the hardware to Vitis
Open Vitis and create a new FSBL project
Add the Device Tree Generator to the Vitis repositories
Create a new device tree project
Build BOOT.bin, uImage, devicetree.dtb and copy them to your SD card
Boot your device
Check /proc/device-tree/ for your device
Begin with the driver development
Export your driver to Kconfig and Yocto (or use him as a loadable module)
You can find all the steps in my Wiki. Feel free to ask me.
But please note: The tutorial isn´t that new and unfortunately I don´t add a custom IP integration to that tutorial (maybe I will add it soon) but it should show you the way how you can do it.