Linking library (from assembly files) with main.c in Makefile - linux

Im passionate about assembly and wanted to start coding from home on linux instead of mac I usually use.
I really struggle for 4 days about this issue.
you can find my makefile and clone repository at the following url:
<code>NAME = libfts.a
ASM_FILES = ft_isascii \
OS := $(shell uname)
ifeq ($(OS), Darwin)
ASM_COMPILER = ~/.brew/bin/nasm -f macho64 -g
else
ASM_COMPILER = nasm -f elf64 -g
endif
ASM_SRC_DIR = srcs/
ASM_OBJ_DIR_NAME = obj
ASM_OBJ_DIR = $(ASM_OBJ_DIR_NAME)/
ASM_OBJ := $(addsuffix .o,$(ASM_FILES))
ASM_OBJ := $(addprefix $(ASM_OBJ_DIR),$(ASM_OBJ))
TEST = maintest.out
TEST_FILES = maintest
C_COMPILER = clang -Wall -Werror -Wextra -O3
TEST_DIR_NAME = test
TEST_DIR = $(TEST_DIR_NAME)/
TEST_OBJ := $(addsuffix .o,$(TEST_FILES))
TEST_OBJ := $(addprefix $(TEST_DIR),$(TEST_OBJ))
OBJ_PATHS := $(ASM_OBJ) $(TEST_OBJ)
all: $(NAME)
$(NAME): $(ASM_OBJ)
ar rc $(NAME) $(ASM_OBJ)
test: re $(TEST_OBJ)
$(C_COMPILER) -L. $(NAME) $(TEST_OBJ) -o $(TEST)
$(ASM_OBJ): $(ASM_OBJ_DIR)%.o: $(ASM_SRC_DIR)%.s
#/bin/mkdir -p $(ASM_OBJ_DIR)
$(ASM_COMPILER) $< -o $#
$(TEST_OBJ): $(TEST_DIR)%.o: $(TEST_DIR)%.c
$(C_COMPILER) -c -I. $< -o $#
clean:
-/bin/rm -f $(OBJ_PATHS)
/usr/bin/find . -name "$(ASM_OBJ_DIR_NAME)" -maxdepth 1 -type d -empty -delete
fclean: clean
-/bin/rm -f $(NAME)
-/bin/rm -f $(TEST)
re: fclean all
.PHONY: all clean fclean re
I have this error message when I try "make test" on the linux:
test/maintest.o: In function `main':
test/maintest.c:(.text+0x33): undefined reference to `ft_isascii'
undefined reference to etc.
.h content:
#ifndef _LIBFTS
# define _LIBFTS
#include <stddef.h>
int ft_isascii(int c);
#endif
ft_isascii.s content:
global _ft_isascii
section .text
_ft_isascii: ; int ft_isascii
and edi, 0xffffff80 ; mask with the 128 firsts bits left to 0 as ASCII range from 0 to 7f in hexa (just below 80)
sete al ; SETE sets AL to 1 if above condition code means "equal", otherwise it sets AL to 0.
movzx eax, al
ret
I would REALLY be thanksful for any tips to solve this issue...
Regards,

There are two problems to be fixed:
First, on ELF targets (most Unixes except macOS), C functions are not decorated with an underscore. To fix your code, remove the leading underscore from all symbols. Make sure to remove it everywhere.
Second, the linker when looking at an archive (.a file) only picks files it needs right now to satisfy dependencies. So when you pass the archive before maintest.o, the linker doesn't take anything from the archive at all as it doesn't need any ft_... symbols at that point. These symbols are only needed once the linker has seen maintest.o. To fix this issue, move the $(NAME) operand to after $(TEST_OBJ). As a general rule of thumb, always place libraries after object files on the linker command line.
On macOS, you won't observe this problem because they use lld, the LLVM linker, which is a bit unconventional in that it defers the choice which objects to take out of archives until it has looked at the symbol tables of all operands, making your actually broken invocation work. Don't depend on this behaviour, please.

Related

ERROR: Installing a Fortran library on Ubuntu 12.04

I have been trying to install the library with a Makefile written in Fortran using the latest gfortran version.
The instructions are:
M-LIB is provided with a very bare-bones makefile, which should be
modified for your Fortran compiler. To compile, run make in the src
directory. This creates library lib.a and executable m-lib.
The Makefile is:
FC = gfortran
FCFLAGS = -O3
AR = ar
ARFLAGS = -cru
LDFLAGS =
LIBRARY = lib.a
PROGRAM = m-lib
PROGOBJECTS = LIBTEST.o EOS.o
LIBOBJECTS = ADATA.o \
ADEBY.o \
AE2PH.o \
AEHPP.o \
AEI3.o \
AZRTR.o
%.o: %.f
$(FC) -c $(FCFLAGS) $<
default: $(PROGRAM)
$(LIBRARY): $(LIBOBJECTS)
rm -f $(LIBRARY)
$(AR) -cr $(LIBRARY) $(LIBOBJECTS)
$(PROGRAM): $(PROGOBJECTS) $(LIBRARY)
$(FC) $(FCFLAGS) -o $(PROGRAM) $(PROGOBJECTS) $(LIBRARY)
install:
cp ../input/q_.input ../example/m-lib.INPUT
cp ./m-lib ../example/m-lib
clean:
rm -f $(LIBOBJECTS) $(PROGOBJECTS)
allclean:
rm -f $(PROGRAM) $(LIBRARY)
make clean
And I get this error:
enter codegfortran -c -O3 LIBTEST.f
LIBTEST.f:36.26:
allocate (character(arglen) :: arg)
1
Error: Variable 'arglen' cannot appear in the expression at (1)
LIBTEST.f:99.72:
DO 10 I=1,NDENS
1
Warning: DO loop at (1) will be executed zero times
LIBTEST.f:104.72:
DO 20 J=1,NTEMP
1
Warning: DO loop at (1) will be executed zero times
make: *** [LIBTEST.o] Error 1
¿Any idea what is wrong?
EDIT
This is source code of EOS.o:
SUBROUTINE EOS(TEMP,TEMP0,P,RHO,E,M)
IMPLICIT REAL*8 (A-H,O-Z)
TEMP=TEMP0
IT=0
10 CONTINUE
IT=IT+1
IF(IT.GT.50) STOP 'TOO MANY ITERATIONS--EOS'
CALL ADEBY (TEMP,RHO,P,ETRIAL,S,CV,DPDT,DPDR,FKROS,CS,KPA,M)
IF (ABS(E-ETRIAL) .LT. 1.0D-9*E) RETURN
TEMP=TEMP+(E-ETRIAL)/CV
GOTO 10
END
This is first lines of the source code of LIBTEST.o:
PROGRAM LIBTEST
IMPLICIT DOUBLE PRECISION (A-H,O-Z)
INTEGER STYLE
PARAMETER (NDENS=0)
PARAMETER (NTEMP=0)
DIMENSION IZETL(21)
COMMON /FILEOS/ KLST, KINP
COMMON /ANGELX/ W,Y,ALFA,BETA,DADT,DADR,DBDT,ZZ,ET,
& SN,CVN,EN,PN,PM,EM,SM,CVM,EC,PC,RHO0,RHO00,ZVIB,
& SMLT,CVMLT,EMLT,PMLT,H1,H2
COMMON /ANEEL/ TEVX,RHOX,ABARX,ZBARM,T32X,FNX
& ,PE,EE,SE,CVE,DPTE,DPRE
& ,NMATSX,IIZX
COMMON /ANEDIS/ GAMMA,PSI,THETA
PARAMETER (MATBUF=64)
COMMON /ANESQT/ SQTS(MATBUF),IPSQTS
DIMENSION RHO(NDENS),TEMP(NTEMP),HISTDENS(100),HISTPRESS(100)
DIMENSION HISTDPDR(100)
DIMENSION TARR(2000)
DIMENSION DARR(2000)
DIMENSION PARR(2000,2000)
DIMENSION SARR(2000,2000)
DIMENSION EARR(2000,2000)
DIMENSION CSARR(2000,2000)
DIMENSION CVARR(2000,2000)
DIMENSION ZKARR(2000,2000)
C
CSTS ADDS --help, --no_table, and file checks
character(:), allocatable :: arg
integer arglen, stat
logical file_exists
call get_command_argument(number=1, length=arglen) ! Assume for simplicity success
allocate (character(arglen) :: arg)
call get_command_argument(number=1, value=arg, status=stat)
IF (arg.NE.'--quiet') THEN
write(*,9020)
write(*,9021)
write(*,9022)
write(*,9023)
(...)

Makefile for IAR. List of src

I have variable in my Makefile:
SRCP = \
main.c \
lib1/src/file1.c \
lib2/src/file2.c
Folders lib1/src and lib2/src may consist other sources, but I need compil only files in SRCP var.
I know one variant:
OBJ_DIR = ./Release/Obj
OBJ = $(SRC:.c=.o)
$(OBJ): $(SRCP)
for source in $(SRCP); do \
$(CC) $(CLAGS) -c $$source -o $(OBJ_DIR)/$#; \
done
But not informative. In console I see $source instead main.c (or any name).
My makefile with errors:
.PHONY: all clean
PROJECT = hello
IAR_TARGET = ./Release
EXE_DIR = $(IAR_TARGET)/Exe
OBJ_DIR = $(IAR_TARGET)/Obj
COMPILE_OPTS = -mcpu=cortex-m3 -mthumb -Wall -g -O0
INCLUDE_DIRS = -I . \
-I lib/inc
SRCP = \
main.c \
lib/src/stm32f10x_tim.c \
lib/src/stm32f10x_adc.c
LIB = -L ./lib/src
SRC := $(notdir $(SRCP))
OBJ_FILES := $(addprefix $(OBJ_DIR)/,$(notdir $(SRCP:.c=.o)))
CC = arm-none-eabi-gcc
CFLAGS = $(COMPILE_OPTS) $(INCLUDE_DIRS)
# mkdir -p $(EXE_DIR) $(OBJ_DIR)
all: $(EXE_DIR)/$(PROJECT).elf
# Linker invocation
$(EXE_DIR)/$(PROJECT).elf: $(OBJ_FILES)
$(CC) $(CFLAGS) $(OBJ_FILES) -o $(EXE_DIR)/$(PROJECT).elf
# Rules
%.o: %.c
$(CC) $(CFLAGS) -c $< -o $#
clean:
rm -rf $(IAR_TARGET)
Error: make: *** No rule to make target 'Release/Obj/main.o', needed by 'Release/Exe/hello.elf'. Stop.
What is the correct version you know?
I don't have any specific experience with IAR projects. But I guess I can help you with the Makefile.
The main changes I propose are:
Change the definition of OBJ_FILES such that it contains a list of the object files with the proper path name, e.g. ./Release/Obj/file1.o. notdir removes the directory, addprefix adds the new directory.
Add a pattern rule how to convert a .c file into a .o file. As object files are a dependency of the final file (a .elf file in this example) and as there are no explicit rules to build the these object file, make will use the pattern rule to build them.
Most likely, GNU make is required for this makefile.
SRCP = \
main.c \
lib/src/stm32f10x_tim.c \
lib/src/stm32f10x_adc.c
OBJ_DIR = ./Release/Obj
OBJ_FILES := $(addprefix $(OBJ_DIR)/,$(notdir $(SRCP:.c=.o)))
# Linker invocation
$(OUTPUT_DIR)/$(PROJECT).elf: $(OBJ_FILES)
$(CC) $(LDFLAGS) $(OBJ_FILES) $(STD_LIBS) -o $(OUTPUT_DIR)/$(PROJECT).elf
# Rules
$(OBJDIR)/%.o: ./%.c
$(CC) $(CFLAGS) -c $< -o $#
$(OBJDIR)/%.o: lib/src/%.c
$(CC) $(CFLAGS) -c $< -o $#
I know!
I have list of files with path:
SRCP := \
main.c \
lib/src/stm32f10x_tim.c \
lib/src/stm32f10x_adc.c
How to get .c file with path by object name?
Look:
OBJ_DIR=Release/Obj
# Rules
%.o:
#echo creating $# ...
$(CC) $(CFLAGS) -c $(filter %$(subst .o,.c,$#), $(SRCP)) -o $(OBJ_DIR)/$#
How to work this $(filter %$(subst .o,.c,$#), $(SRCP))?
For example, $# have stm32f10x_adc.o
$(subst .o,.c,$#) change .o to .c, so we have stm32f10x_adc.c. Very important! This string do not have spaces (like I like:) ). I do mistake, when write $(subst .o, .c, $#). It is not clear for me (:
%$(subst .o,.c,$#). % work with filter.
$(filter %$(subst .o,.c,$#), $(SRCP)) take %stm32f10x_adc.c from $(SRCP) with path. And... We have lib/src/stm32f10x_adc.c!
Thankyou for the help!

Make: No rule to make target 'part2.d', needed by MahApp

I have the following Makefile:
SOURCES = part1.cpp part2.cpp main.cpp
OBJECTS = ${SOURCES:.cpp=.o}
DEPS = ${SOURCES:.cpp=.d}
CXX = g++
CXXFLAGS = -Wall -I -std=c++11
ExecutableName = Partsapp
BUILD_DIR = build/host
MahApp: $(BUILD_DIR)/$(DEPS) $(BUILD_DIR)/$(OBJECTS)
$(CXX) $(CXXFLAGS) -o $# $(BUILD_DIR)/$(OBJECTS)
build/host/%.d: ./%.cpp
$(CXX) -MT$(#:.d=.o) -MM $(CXXFLAGS) $^ > $#
-include build/host/$(DEPS)
clean:
rm -f $(OBJECTS) $(DEPS) MahApp
Now, whenever I try to run it, I get the following error:
No rule to make target 'part2.d', needed by 'MahApp'. Stop.
Now, the funny thing is that it does manage to create part1.d correctly from the pattern matching rule, however after that it just seizes to work, and I just can't figure out why!
Any help would be much appreciated :)
SOURCES = part1.cpp part2.cpp main.cpp
...
DEPS = ${SOURCES:.cpp=.d}
...
BUILD_DIR = build/host
MahApp: $(BUILD_DIR)/$(DEPS) ...
...
DEPS expands to part1.d part2.d main.d, so $(BUILD_DIR)/$(DEPS) expands to build/host/part1.d part2.d main.d, and Make is telling you it can't find part2.d.
The construction you want is:
BUILD_DIR = build/host
DEPS = $(patsubst %.cpp, $(BUILD_DIR)/%.d, $(SOURCES))
(There are other ways to do it.) And the way to examine your variables to see if they are what you think they are is like this:
$(info $(DEPS))

Embedded Linux. Symbol lookup error

I made userdef.c for adding some function otsu_Threshold and onBinarOtzu.
The function library header file is pxa_lib.h and I typed function like this
void otzu_Threshold(unsigned char* orgImg, unsigned char* outImg, int height, int width);
void onBinarOtzu(unsigned char* m_InImg);
In camera.c that is in Folder 'demo', I typed
'#include < pxa_lib.h >
....
....
onBinarOtzu(vidbuf->ycbcr.y);
MakeFile
CC=/usr/local/arm-linux-4.1.1/bin/arm-linux-gcc
CFLAGS+= -mcpu=iwmmxt -mtune=iwmmxt -mabi=aapcs-linux \
-Iinclude/ -DDEBUG_BUILD
LFLAGS+=-Llib/ -lpxadev
.PHONY: all compile install-host install-target clean clean-local \
uninstall-host uninstall-target
all: compile install-host install-target
compile: lib/libpxadev.so bin/camera
lib/libpxadev.so: driver/camera.o driver/overlay2.o driver/userdef.o
$(CC) $(CFLAGS) -shared -W1,-soname,libpxadev.so -o lib/libpxadev.so $^
bin/camera: demo/camera.c
$(CC) $(CFLAGS) $(LFLAGS) -o $# $^
install-host:
install-target:
clean: clean-local uninstall-host uninstall-target
clean-local:
-rm -f lib/* driver/*.o
-rm -f bin/*
uninstall-host:
-rm -f $(PXA_HOST_LIB_DIR)/libpxadev.so
uninstall-target:
$(SUDO) rm -f $(PXA_TARGET_BIN_DIR)/camera
$(SUDO) rm -f $(PXA_TARGET_LIB_DIR)/libpxadev.so
I made binary file and transmitted in robot by minicom,zmodem.
But, error had occured.
[root#WENDERS root]# [root#WENDERS root]# ./camera
PXA_CAMERA:choose MT.... sensor
PXA_CAMERA:choose MT.... sensor
camera_config : streamparm.type = 1
count = 3
width=320, height=240
./camera: symbol lookup error: ./camera: undefined symbol: onBinarOtzu
What sould I do...
ps. I'm sorry. I can't English well...
It looks like you linked to shared libraries while compiling, but they aren't loaded on the target.
You'll have to add the libraries somewhere Linux can find them, perhaps in /usr/lib or /lib, or somewhere specified by the $LD_LIBRARY_PATH variable. Exactly how you do this is dependent on the environment you have set up.

make: -c: Command not found

First of all, I'm trying to get used to makefiles but yet I#m new with this. The following file is supposed to, first, compile all ./src/*.cpp files to ./src/*.o (where the filename survives) and afterwards complete compilation with simulation.cpp and linking the whole stuff together. Now, make returns the error message:
make: -c: Command not found
I have literally no clue how to proceed! Would the wildcard-construct even work in the way desired? Thanks a lot for your effort!
#basic stuff
TRUE = 1
FALSE = 0
SHELL := #!/bin/bash
# path names
SRCPATH = ./src/
CLEANPATH = ./res/ \
./crash/
# source files.
MAIN = simulation.cpp
OBJS = $(wildcard $(SRCPATH)*.o)
SRCS = $(wildcard $(SRCPATH)*.cpp)
INCLUDES = $(wildcard $(SRCPATH)*.h)
#GLOBAL MACROS PASSED TO PROGRAM!
MODEL_MRT = $(TRUE) #if true model used is MRT else SRT
PARALLEL = $(TRUE)
GRAVITY = $(TRUE)
# output file name
OUT = simulation
# C++ compiler flags (-g -O2 -Wall)
CXXFLAGS = -g -Wall -O -fopenmp
CXXDEFINES = -D MODEL=$(MODEL_MRT) -D PARALLEL=$(PARALLEL) -D GRAVITY=$(GRAVITY)
# compiler
CXX = g++
$(OUT) : $(OBJS)
$(CXX) $(CXXFLAGS) $(MAIN) $(OBJS) $(CXXDEFINES) -o $(OUT)
$(OBJS) : $(SRCS) $(INCLUDES)
$(CXX) $(CXXFLAGS) -c $(SRCS) -o $(OBJS)
clean : $(OUT)
rm $(OBJS)
rm $(CLEANPATH)/*.*
run : $(OUT) clean
./$(OUT)
.PHONY: clean run
You're tricking make with your SHELL variable, it sees is at empty as it is just a comment.
Change
SHELL := #!/bin/bash
to
SHELL := /bin/bash
This line:
SHELL := #!/bin/bash
is incorrect.
Your makefile should work perfectly well if you leave that line out altogether. If you do need something there, try
SHELL := /bin/bash

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