How to prevent Makefile cleaning objects before linking (using -j option) - linux

I'm trying to learn how to use linux makefiles.
I have the following two files:
makefile.config
# Project Configurations
# Project Name
PROJECT_NAME = myapp
# Project Version
PROJECT_VERSION = 0.1
# Program or Shared Library
IS_LIBRARY = no
# Source Files Directory
SRC_DIRECTORY = src
# Header Files Directory
INC_DIRECTORY = inc
# Library Header Files Directory
LIB_DIRECTORY = lib
# Build Output Directory
BIN_DIRECTORY = ../Executable
# Installation Directory Exec
INS_DIRECTORY = /usr/local/bin/
# Installation Directory Headers
INS_HEARERS_DIRECTORY = /usr/local/include/
# Installation Directory SO
INS_SO_DIRECTORY = /usr/local/lib/
# C Flags
CFLAGS = -O3 -D_GNU_SOURCE -Wfatal-errors
# C++ Flags
CXXFLAGS = $(CFLAGS)
# Linker Flags
LDFLAGS = $(shell dpkg-buildflags --get LDFLAGS)
# Linker Libraries
LDLIBS = -fno-inline
# Debug Yes / No
DEBUG = yes
# C Compiler
CC = gcc
# C++ Compiler
CXX = g++
Makefile
$(info Starting building process)
# include configurations
include makefile.conf
$(info - Makefile.conf loaded)
# find project files
H_FILES := $(shell find -L ./ -name '*.h' -exec dirname {} \; | sed 's/ /\\ /g' | uniq)
C_FILES := $(shell find ./ -name '*.c' -type f | sed 's/ /\\ /g' | uniq)
CXX_FILES := $(shell find ./ -name '*.cpp' -type f | sed 's/ /\\ /g' | uniq)
O_FILES := $(C_FILES:.c=.o)
O_FILES += $(CXX_FILES:.cpp=.o)
H_FILES := $(notdir $(H_FILES))
C_FILES := $(notdir $(C_FILES))
CXX_FILES := $(notdir $(CXX_FILES))
INCLUDES := $(H_FILES:%=-I%)
$(info - Project Files Loaded)
ifeq ($(DEBUG),yes)
$(info - Debug flag added [makefile.conf DEBUG = yes])
CFLAGS := -g3 $(CFLAGS)
endif
ifeq ($(IS_LIBRARY),yes)
$(info - Set Parameters for Shared Library build process)
ALL_PARAMETERS = lib$(PROJECT_NAME).so.$(PROJECT_VERSION) clean
ALL_TYPE = lib$(PROJECT_NAME).so.$(PROJECT_VERSION): $(O_FILES)
LIBFLAGS = -shared -Wl,-soname,lib$(PROJECT_NAME).so
CFLAGS := -fPIC $(CFLAGS)
CXXFLAGS := -fPIC $(CXXFLAGS)
else
$(info - Set Parameters for Application build process)
ALL_PARAMETERS = $(PROJECT_NAME) clean
ALL_TYPE = $(PROJECT_NAME): $(O_FILES)
LIBFLAGS =
endif
# Build Process
all: $(ALL_PARAMETERS)
$(ALL_TYPE)
#echo - [OUTPUT][CXX] $# #[$(BIN_DIRECTORY)]
#$(CXX) $(CFLAGS) $(INCLUDES) $(LDFLAGS) $(LIBFLAGS) -o $(BIN_DIRECTORY)/$# $^ $(LDLIBS)
%.o: %.c
#echo - [CC] $#
#$(CC) $(CFLAGS) -c $(INCLUDES) -o $# $< $(LFLAGS)
%.o: %.cpp
#echo - [CXX] $#
#$(CXX) $(CXXFLAGS) -c $(INCLUDES) -o $# $< $(LFLAGS)
# Clear Objects
clean:
$(info - Remove all .o [object] files)
#find . -name \*.o -type f -delete
# Clear Objects & Executables
cleanall:
$(info - Remove all .o [object] files)
#find . -name \*.o -type f -delete
$(info - Remove all files in $(BIN_DIRECTORY))
#find $(BIN_DIRECTORY) -name \*.* -type f -delete
# Install Project
install:
#cp -r $(BIN_DIRECTORY)/lib$(PROJECT_NAME).so.$(PROJECT_VERSION) $(INS_SO_DIRECTORY)
#cp -r $(LIB_DIRECTORY)/* $(INS_HEARERS_DIRECTORY)
#ln -s $(INS_SO_DIRECTORY)/lib$(PROJECT_NAME).so.$(PROJECT_VERSION) $(INS_SO_DIRECTORY)/lib$(PROJECT_NAME).so
#ldconfig
$(info - Installation completed)
# Uninstall Project
uninstall:
#rm $(INS_SO_DIRECTORY)/lib$(PROJECT_NAME).so
#rm $(INS_SO_DIRECTORY)/lib$(PROJECT_NAME).so.*.*
#rm $(INS_HEARERS_DIRECTORY)/$(PROJECT_NAME).h
#ldconfig
$(info - Uninstallation completed)
Everything works perfect ...well at least for what i'm using it for.. however when i try to execute the makefile with -j option (ex.)
$ make -j4
the procedure cleans the objects (.o) before linking them.
iikem#isca-lab:Source Code$ make -j4
Starting building process
- Makefile.conf loaded
- Project Files Loaded
- Debug flag added [makefile.conf DEBUG = yes]
- Set Parameters for Shared Library build process
- [CXX] src/isca-streamer.o
- [CXX] src/isca-streamer-pause.o
- [CXX] src/isca-streamer-thread-image.o
- [CXX] src/isca-streamer-initialize.o
- [CXX] src/isca-streamer-start.o
- [CXX] src/isca-streamer-stop.o
- [CXX] src/isca-streamer-thread-socket.o
- [CXX] src/isca-streamer-clear.o
- Remove all .o [object] files
- [CXX] src/isca-streamer-settings.o
- [OUTPUT][CXX] libisca-streamer.so.0.1 #[../Executable]
g++: error: src/isca-streamer.o: No such file or directory
g++: error: src/isca-streamer-initialize.o: No such file or directory
g++: error: src/isca-streamer-thread-image.o: No such file or directory
g++: error: src/isca-streamer-pause.o: No such file or directory
g++: error: src/isca-streamer-start.o: No such file or directory
g++: error: src/isca-streamer-stop.o: No such file or directory
Makefile:71: recipe for target 'libisca-streamer.so.0.1' failed
make: *** [libisca-streamer.so.0.1] Error 1
How can i fix this problem? (prevent cleaning objects step to execute before linking step)

You can't add clean as a prerequisite for your all target if you use -j, because it will be run in parallel with the linker and deleting files is a lot faster than linking them.
So you have to remove the clean target from your ALL_PARAMETERS variable, then you won't delete objects in the middle of your link line anymore.
I have no idea why you want to delete all the objects after every run: you don't even need make or makefiles at all if you're going to rebuild everything from scratch every time: just create a shell script. The entire point of using a makefile is to avoid rebuilding parts of the project that haven't changed.
But, if you really do want to do that then the simplest way is probably using recursive make; for example:
all: $(ALL_PARAMETERS)
$(MAKE) clean
will only ever make clean after all the prerequisites of all have completely built, even if you run with -j.

Related

How to make a makefile rule that stores source code in backup directory?

So I have this make file
#makefile to build a program
#program depends on components: name and main
myname: main.o name.o
g++ -c -g name.cpp
# name.cpp has it's own header file
name.o: name.cpp name.h
g++ -c -g name.cpp
# main.cpp also user the header file name.h
main.o: main.cpp name.h
g++ -c -g main.cpp
clean:
/bin/rm -f myname *.o
I need to modify the makefile to include a rule that creates a backup of the source files, makefile, and readme in an archive directory. This rule needs to create a tar.gz file containing the files I mentioned. The.tar.gz file should be placed in a directory named backup within my current working directory. This backup rule should be executed by 'make backup' and the output should be a .tar.gz file in the backup directory. This backup rule should create the directory if it does not already exist.
Any help would be greatly appreciated
EDIT: the makefile already works as intended as is, I just need to figure out how to add this rule.
PROG := myname
HDR := name.h
SRC := main.cpp name.cpp
OBJ := main.o name.o
ARCHIVE := tar.gz
TARFILES := $(SRC) $(HDR) makefile readme
# original
myname: main.o name.o
g++ -c -g name.cpp
# suggested replacement
# $(PROG): $(OBJ)
# g++ -g $(OBJ) -o $#
name.o: name.cpp name.h
g++ -c -g name.cpp
main.o: main.cpp name.h
g++ -c -g main.cpp
clean:
/bin/rm -f $(PROG) $(OBJ)
.PHONY: backup
backup:
#mkdir -p $#
tar zcvf $#/$(ARCHIVE) $(TARFILES)

How to run C project written in linux on Windows?

I need to run C project written in Linux on Windows. The project contains the following: main.c, makefile, (.c) and (.h) files under folder (libs), and it includes "GL/glut.h" (openGL).
I have tried run it under Visual Studio, but didn't work out. Now, I am working with NetBeans under MinGW compiler. I did all steps mentioned to make NetBeans use MinGW compiler, but still the makefile doesn't compile, and I can't understand the error behind.
Any help is very appreciated. Thank you.
Find below the makefile:
EXECUTABLE = main
CC = g++
CWD=$(shell pwd)
INCLUDES =
CFLAGS= -O3 -funroll-loops -fomit-frame-pointer #-static -Wall
LIBFLAGS = -L./ -lGL -lGLU -lglut #-L/usr/X11R6/lib # -lXxf86vm
SOURCE_FILES = $(shell find -name \*.c)
INTERM_DIR=obj
all: $(EXECUTABLE)
clean:
$(RM) -rf $(INTERM_DIR) $(EXECUTABLE)
.PHONY: clean
$(INTERM_DIR) :
mkdir -p $#
$(INTERM_DIR)/%.dep: %.c
mkdir -p `dirname $#`
echo -n `dirname $#`/ > $#
$(CC) $(CFLAGS_COMMON) $< -MM | sed -r -e 's,^(.*)\.o\s*\:,\1.o $# :,g' >> $#
ifneq ($(MAKECMDGOALS),clean)
-include $(SOURCE_FILES:./%.c=./$(INTERM_DIR)/%.dep)
endif
$(INTERM_DIR)/%.o: ./%.c
mkdir -p `dirname $#`
$(CC) $(CFLAGS) -c $< -o $#
$(EXECUTABLE): $(SOURCE_FILES:./%.c=./$(INTERM_DIR)/%.o)
mkdir -p `dirname $#`
$(CC) $^ $(LIBFLAGS) -o $#
The error I got:
C:\cygwin64\bin\bash.exe -c 'C:/Program Files/mingw-w64/x86_64-7.1.0-posix-seh-rt_v5-rev0/mingw64/bin/gcc.exe' -MM
gcc.exe: fatal error: no input files
compilation terminated.
COMPILE FILE FAILED (exit value 1, total time: 306ms)
I believe when you install Visual Studio it gives the option to run with Linux. Another way you might be able to get around this is to use a VM with a Linux OS.

Compilation issue while using traceroute in a custom tool

For my master thesis, I am developing a tool to test and evaluate a formula for multipath networks.
I will be using the traceroute tool to trace the network between two multihomed hosts by passing to it -s flag, src IP and dst IP. I have multiple source and dest IPs. So the traceroute will be performed multiple times.
I am not good with compilation stuff. The downloaded code for traceroute-2.1.0 from the website https://sourceforge.net/projects/traceroute/files/traceroute/ has following "make" related files.
Makefile
make.defines
make.rules
default.rules
I have applied my changes to the code in traceroute.c, and I can compile it properly by "make" and "make install". But these changes are made to the traceroute tool for the system(obviously).
What I want to achieve is, to have it with a new name, for example "mytrace" instead of "traceroute". So it doesnt come in conflict with the traceroute tool and I could use both tools. Calling with "traceroute" and other with "mytrace" in cmd line.
Question is: What changes I must make before recompiling, in order to achieve it.
Here is the code of the file "makefile".
# Global Makefile.
# Global rules, targets etc.
#
# See Make.defines for specific configs.
#
srcdir = $(CURDIR)
override TARGET := .MAIN
dummy: all
include ./Make.rules
targets = $(EXEDIRS) $(LIBDIRS) $(MODDIRS)
# be happy, easy, perfomancy...
.PHONY: $(subdirs) dummy all force
.PHONY: depend indent clean distclean libclean release store libs mods
allprereq := $(EXEDIRS)
ifneq ($(LIBDIRS),)
libs: $(LIBDIRS)
ifneq ($(EXEDIRS),)
$(EXEDIRS): libs
else
allprereq += libs
endif
endif
ifneq ($(MODDIRS),)
mods: $(MODDIRS)
ifneq ($(MODUSERS),)
$(MODUSERS): mods
else
allprereq += mods
endif
ifneq ($(LIBDIRS),)
$(MODDIRS): libs
endif
endif
all: $(allprereq)
depend install: $(allprereq)
$(foreach goal,$(filter install-%,$(MAKECMDGOALS)),\
$(eval $(goal): $(patsubst install-%,%,$(goal))))
what = all
depend: what = depend
install install-%: what = install
ifneq ($(share),)
$(share): shared = yes
endif
ifneq ($(noshare),)
$(noshare): shared =
endif
$(targets): mkfile = $(if $(wildcard $#/Makefile),,-f
$(srcdir)/default.rules)
$(targets): force
#$(MAKE) $(mkfile) -C $# $(what) TARGET=$#
force:
indent:
find . -type f -name "*.[ch]" -print -exec $(INDENT) {} \;
clean:
rm -f $(foreach exe, $(EXEDIRS), ./$(exe)/$(exe)) nohup.out
rm -f `find . \( -name "*.[oa]" -o -name "*.[ls]o" \
-o -name core -o -name "core.[0-9]*" -o -name a.out \) -print`
distclean: clean
rm -f `find $(foreach dir, $(subdirs), $(dir)/.) \
\( -name "*.[oa]" -o -name "*.[ls]o" \
-o -name core -o -name "core.[0-9]*" -o -name a.out \
-o -name .depend -o -name "_*" -o -name ".cross:*" \) \
-print`
libclean:
rm -f $(foreach lib, $(LIBDIRS), ./$(lib)/$(lib).a ./$(lib)/$(lib).so)
# Rules to make whole-distributive operations.
#
STORE_DIR = $(HOME)/pub
release release1 release2 release3:
#./chvers.sh $#
#$(MAKE) store
store: distclean
#./store.sh $(NAME) $(STORE_DIR)
I wrote to the programmer of the tool, his solution worked for me. Here it is:
Just rename the sub-directory "traceroute" to another name, say "mytrace".
IOW, you'll have "include, libsupp, mytrace" instead of "include, libsupp, traceroute".
Additionally, if you plan to create a tarball with the changed name etc., it seems that you have to rename "NAME = traceroute" to "NAME = mytrace" in the Make.defines file.
Best regards,
Dmitry Butskoy

Qmake does not include the library path for qt

I just install qt on my slax box,
And I tried to write and compile using qmake.
But the problem is qmake does not write it's 'Makefile' to include -Lqt-mt or -Lqt.
I have to give it manually otherwise there are unresolved links are there. What I could
do for this?Any workaround on this?
And this is the 'Makefile' output by the qmake.
#############################################################################
# Makefile for building: hello
# Generated by qmake (2.01a) (Qt 4.5.3) on: Tue Feb 2 04:04:03 2010
# Project: hello_world.pro
# Template: app
# Command: /usr/bin/qmake -unix -o Makefile hello_world.pro
#############################################################################
####### Compiler, tools and options
CC = gcc
CXX = g++
DEFINES =
CFLAGS = -pipe $(DEFINES)
CXXFLAGS = -pipe $(DEFINES)
INCPATH = -I/usr/lib/qt-3.3.8b/mkspecs/linux-g++ -I.
LINK = g++
LFLAGS =
LIBS = $(SUBLIBS)
AR = ar cqs
RANLIB =
QMAKE = /usr/bin/qmake
TAR = tar -cf
COMPRESS = gzip -9f
COPY = cp -f
SED = sed
COPY_FILE = $(COPY)
COPY_DIR = $(COPY) -r
INSTALL_FILE = $(COPY_FILE)
INSTALL_DIR = $(COPY_DIR)
INSTALL_PROGRAM = $(COPY_FILE)
DEL_FILE = rm -f
SYMLINK = ln -sf
DEL_DIR = rmdir
MOVE = mv -f
CHK_DIR_EXISTS= test -d
MKDIR = mkdir -p
####### Output directory
OBJECTS_DIR = ./
####### Files
SOURCES = hello_world.cpp
OBJECTS = hello_world.o
DIST = hello_world.pro
QMAKE_TARGET = hello
DESTDIR =
TARGET = hello
first: all
####### Implicit rules
.SUFFIXES: .o .c .cpp .cc .cxx .C
.cpp.o:
$(CXX) -c $(CXXFLAGS) $(INCPATH) -o "$#" "$<"
.cc.o:
$(CXX) -c $(CXXFLAGS) $(INCPATH) -o "$#" "$<"
.cxx.o:
$(CXX) -c $(CXXFLAGS) $(INCPATH) -o "$#" "$<"
.C.o:
$(CXX) -c $(CXXFLAGS) $(INCPATH) -o "$#" "$<"
.c.o:
$(CC) -c $(CFLAGS) $(INCPATH) -o "$#" "$<"
####### Build rules
all: Makefile $(TARGET)
$(TARGET): $(OBJECTS)
$(LINK) $(LFLAGS) -o $(TARGET) $(OBJECTS) $(OBJCOMP) $(LIBS)
Makefile: hello_world.pro /usr/lib/qt-3.3.8b/mkspecs/linux-g++/qmake.conf
$(QMAKE) -unix -o Makefile hello_world.pro
qmake: FORCE
#$(QMAKE) -unix -o Makefile hello_world.pro
dist:
#$(CHK_DIR_EXISTS) .tmp/hello1.0.0 || $(MKDIR) .tmp/hello1.0.0
$(COPY_FILE) --parents $(SOURCES) $(DIST) .tmp/hello1.0.0/ && (cd `dirname .tmp/hello1.0.0` && $(TAR) hello1.0.0.tar hello1.0.0 && $(COMPRESS) hello1.0.0.tar) && $(MOVE) `dirname .tmp/hello1.0.0`/hello1.0.0.tar.gz . && $(DEL_FILE) -r .tmp/hello1.0.0
clean:compiler_clean
-$(DEL_FILE) $(OBJECTS)
-$(DEL_FILE) *~ core *.core
####### Sub-libraries
distclean: clean
-$(DEL_FILE) $(TARGET)
-$(DEL_FILE) Makefile
compiler_clean:
####### Compile
hello_world.o: hello_world.cpp
$(CXX) -c $(CXXFLAGS) $(INCPATH) -o hello_world.o hello_world.cpp
####### Install
install: FORCE
uninstall: FORCE
FORCE:
And here is my .pro file that I used.
TEMPLATE=app
CONFIG+= qt warn_on release
HEADERS=
SOURCES=hello_world.cpp
TARGET=hello
I already set the $QTDIR and I think everything is in place.
Where I missed? Why I have to give it manually? Why qmake does not work in first
place?
EDIT:
There in makefile
LIBS = $(SUBLIBS)
What I did is change it to,
LIBS = $(SUBLIBS) -lqt-mt
After I changed everything works fine ! The problem is again , why I have to do such
a thing manually?
FOR #Frank Osterfeld
I think I'm using correct 'qmake' because ,
When I hit, qmake --version , I do get this.
QMake version 2.01a
Using Qt version 4.5.3 in /usr/lib/qt/lib
--Thanks in advance--
When there are multiple Qt installations on a machine, it's important the environment has been set-up properly to point to the right Qt version. The following are important environment variables to check:
$QTDIR -- should point to the base directory for the Qt installation.
$QMAKESPEC -- should point to a make specification directory under $QTDIR (e.g. $QTDIR/mkspecs/linux-g++).
$QT_PLUGIN_PATH -- should point to the plug-in directory, typically within the Qt installation (e.g. $QTDIR/plugins).
$PATH -- should have the $QTDIR/bin directory within it. The installation that you wish to use should be first within the $PATH.
If all else fails, check your full environment to ensure that the correct Qt installation is being referred to (use env on *nix, set on Windows).
If you notice directories pointing to the wrong installation within the Makefile generated by qmake, it is likely that your environment hasn't been properly set (in this case, $QMAKESPEC was the culprit).
Finally, it's important to note that the libraries from Qt3 are no longer present in Qt4: Qt3 has libqt-mt, libqui, etc. Qt4 has libQtCore, libQtGui, etc.

how to include .h document in makefile

I am programming for a big project, so I cooperate with others.
To make the directory easily managed, my directory is like below:
project:
--include (header files from others supplied for me)
--lib (libraries from others supplied for me)
--L3_CVS (this folder include all my files)
-- Makefile
-- sourceFile (all my source files here)
-- include_private(all header files used only by myself)
-- appl (all my C files here)
My Makefile is below:
####################################################
CROSS_COMPILE=/home/powerpc-wrs-linux-gnu/x86-linux2/powerpc-wrs-linux-gnu-ppc_e500v2-glibc_cgl-
EXTRA_CFLAGS += -g
EXTRA_LDFLAGS +=
LIBSB =-Wl,--start-group -ldiag -ldiag_esw -lacl -ldiagcint -lcint -lsal_appl -lsal_appl_editline -lsal_appl_plat\
-lbcm -lbcm_esw -lbcm_common -lfirebolt -ltitan -ltrident -lhumv -lbradley -lherc -ldraco -lscorpion\
-ltriumph -ltrx -ltriumph2 -lenduro -lkatana -lflexctr -lptp -lsoc_esw -lsoc -lsoc_phy -lsoc_mcm\
-lsoccommon -lsoc_shared -lshared -lsal_core -lsal_core_plat -lcustomer -lsoc_nemo -lsoc_clsbuilder\
-lsoc_sal \
-lbcm_compat -lbcm_rpc -lcpudb -ltrx -lstktask -llubde -ldrivers -ldiscover -lcputrans \
-lrcu -lpthread -lrt -lm -Wl,--end-group
LIBS = -ldiag -lrcu
CC = $(CROSS_COMPILE)gcc
LD = $(CROSS_COMPILE)ld
AR = $(CROSS_COMPILE)ar
STRIP = $(CROSS_COMPILE)strip
SRC_PATH := ./SourceFile/appl
HEAD_PATH := ./SourceFile/include-private
INC_DIR = ../include
LIB_PATH = ../lib
APP_NAME = L3appl
SRCS := $(wildcard $(SRC_PATH)/*.c)
export $(SRCS)
OBJS:= $(patsubst %.c,%.o,$(SRCS))
%.d: %.c
#set -e; rm -f $#; \
$(CC) -MM $< > $#.$$$$; \
sed 's,\($*\)\.o[ :]*,\1.o $# : ,g' < $#.$$$$ > $#; \
rm -f $#.$$$$
sinclude $(SRCS:.c=.d)
INCLUDES = $(wildcard $(HEAD_PATH)/*.h)
$(APP_NAME):$(OBJS)
$(CC) -c -I$(INC_DIR) $(SRCS)
$(CC) -o $(APP_NAME) $(OBJS) -L$(LIB_PATH) $(LIBSB) -lpthread -lrt -lm
.PHONY:clean
clean:
rm -f $(OBJS) $(APP_NAME)
#################################################
My problem is that when I run make in terminal, it always show : ***No such file or directory
compilation terminated. which seems the .h files in ./SourceFile/include-private do not be included.
But, in fact, I have use "INCLUDES = $(wildcard $(HEAD_PATH)/*.h)" include these .h files.
I don't know where is wrong!
this is my first time to write makefile. So if there are mistakes in my makefile, I would appreciate that you would point them out !
thank you for your help very much!!!!!!!
You should have something like
CFLAGS = -Wall $(OPTIMFLAGS) $(INCLUDEFLAGS)
INCLUDEFLAGS = -I $(INC_DIR) -I $(HEAD_PATH)
OPTIMFLAGS = -g -O
You can use remake to debug your Makefile.
You can try to change $(CC) -c -I$(INC_DIR) $(SRCS) to $(CC) -c -I$(INC_DIR) -include $(INCLUDES) $(SRCS)
or $(CC) -c -I$(INC_DIR) $(SRCS) to $(CC) -c -I$(INC_DIR) -I$(INCLUDES) $(SRCS)
where INCLUDES is ./SourceFile/include-private (only the directory, no .h files)
Edit: Usually you don't have to explicitly include the .h files, but that's what the first change do. The second change does not add the .h files explicitely but provide the compiler another include directory where it could search for necessary .h files.
Refer to GCC man file for more info.
Regards

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