Can I determine number of byte transfer using DMA subsystem in linux? - linux

I have a code that write data to a I2C-EEPROM. The i2c-driver is config to use DMA. But is there anyway I can check that data is transfered by i2c using DMA from my program in user-space?
Thanks!

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Linux Kernel ALSA Driver DMA to FPGA issue

I'm working on a zynq 7000 SOC. I wrote an ALSA driver. Inside the FPGA, I implemented all the circuitery (FIFO, clocks generator, I2S dac output). From the Linux kernel point of view, there is an address to feed sample in the FPGA FIFO, one address to read the hardware pointer and an interrupt for the "snd_pcm_period_elapsed" function call.
In the "pcm_copy" callback, i copy samples from userspace to kernel space previously allocaded buffer, and then, i use a loop to push data in the FPGA from the kernel buffer.
I would like to USE an AXI dma to be able to copy directly from the pcm buffer to the FPGA FIFO. The DMA works perfectly (i used something very simple and not the linux DMA api witch is for me very difficult to understand...)
To test my DMA, i allocate a coherent buffer "dma_alloc_coherent" and i copy the samples in the coherent buffer and then i launch the transfert.
My issue is: I don't undersand how to get the physical address of the PCM buffer to be able to use the DMA transfert directly without copy in the coherent buffer. I read a lot of documents and i looked a lot of devices drivers, most of them are using PCI DMA witch is an other story ...
I founded somewhere that i have to implement the mmap callback in my alsa driver, but i didn't understand well, i also looked arround the "dma_area" field in the substream data structure witch contain an address, but if i use it, i have a dma error...
I really want to well understand how the pcm ring buffer is allocated and so on, does anybody can help me ?
Best regards,
Nicolas

Efficient USB bulk transfer to python shared memory

I am trying to stream data from a USB device to a python3 shared memory array with as little overhead as possible. Currently I am reading a 128KB packet from a usb device using pyusb. I have created a 2D (1024 x 128Kb) shared memory block from the multiprocessing.shared_memory library. I would like to store this packet into the shared memory block, flush the packet, and read another packet before the hardware buffer overflows (we're going at approximately 40MB/s).
My current issue is that pyusb returns data in an array.array type and the destination is a memoryview object. Is there an efficient way to copy this data over the the shm block?

why firmware is part of a driver. Is it important, Can I exclude it from a driver

First why firmware is important. For example in real drivers I see there is DMA or MMIO read/write is done, but normally driver code in Linux add firmware struct after requesting it from Kernel using request_firmware function.
why should I add firmware in PCI driver when i can read and write to device from driver using direct memory access. DMA is totally different and has nothing to do with firmware. DMA map device object to kernel virtual page and firmware struct object simple has read and write operations.which I don't know why they are needed. For example for typical driver this function is a struct of firmware write operations
typedef void (*my_driver_write_phy)(struct mydriver_private *o, int register, int val);
This function is registered as a callback and member of my driver's firmware struct. so I guess Kernel calls this function. But my question is, when does kernel call this function. is it used for additional features (please explain if it can be excluded) or is it called every time when data transfer happen from device to/from system including when DMA memory is accessed
So basically real question is: IS firmware required also for Direct Memory access? AND can it be excluded

Low level IO in linux kernel

I am writing a driver for a device that generates a bunch of data and stores its in a memory buffer. Driver should read this buffer and store data to a nvme storage. Device and memory buffer are implemented in fpga logic. The buffer size is about 1G. CPU sees it like a regular ram but linux know nothing about it and this is a problem. When I use bio layer in order to save the data I need a strust* page pointer but I don’t have one.
The question is:
Is there any way to save the data from the buffer using just a physical address and size?
Or I have to use pages so I need to add this buffer to linux memory pool somehow.

Efficient detection if value at memory address has been changed?

This more a general question. Consider an external device. From time to time this device writes data via its device driver to a specific memory address. I want to write a small C program which read out this data. Is there a better way than just polling this address to check if the value has been changed? I want to keep the CPU load low.
I have done some further research
Is "memory mapped IO" an option? My naive idea is to let the external device writes a flag to a "memory mapped IO"-address which triggers a kernel device driver. The driver then "informs" the program which proceed the value. Can this work? How can a driver informs the program?
The answer may depend on what processor you intend to use, what the device is and possibly whether you are using an operating system or RTOS.
Memory mapped I/O per se is not a solution, that simply refers to I/O device registers that can be directly addressed via normal memory access instructions. Most devices will generate an interrupt when certain registers are updated or contain new valid data.
In general if using an RTOS you can arrange for the device driver to signal via a suitable IPC mechanism any client thread(s) that need to handle the data. If you are not using an RTOS, you could simply register a callback with the device driver which it would call whenever the data is updated. What the client does in the call back is its business - including reading the new data.
If the device in question generates interrupts, then the handling can be done on interrupt, if the device is capable of DMA, then it can handle blocks of data autonomously before teh DMA controller generates an DMA interrupt to a handler.

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