Basic question about linux interrupt handling
In my driver i disable the interrupt line of a peripheral and do some processing, during this time peripheral is sending interrupt. when i enable the interrupt line i received the pending interrupt which happened during that time.
is this correct understanding?
If yes how can i discard those interrupt which came during the interrupt disable period.
I can implement some work around using some delay, looking for linux API or clean way to do this.
Before enabling the interrupt we can set
desc = irq_to_desc(client->irq);
desc->istate &= ~IRQS_PENDING;
and enable the interrupt line it will clear all the pending interrupt, but the code says we should never modify these variable.
Thank you
May be I did not understood but I think what you must do is:
disable interupt on the device directly and not using kernel interrupt handling routines
the poll your device, fetching all event. may be you should do this in a threaded interrupt handler
when finished re-enable interrupts on the device
Related
say I have some code as follows:
local_irq_disable();
... // some interrupts come during this time
local_irq_enable();
after I called local_irq_enable(), all interrupts blocked(pending interrupts) are still there & cause the cpu to respond.
Is there anything will clear pending interrupts?
my code runs on an ARM aarch64 machine.
A typical chain is that the cpu interrupt pin is multiplexed via an interrupt controller (ex. GIC) to a set of devices.
Disabling interrupts merely shunts the pin on the CPU, the interrupt controller still maintains the pending state. You could use a feature on the interrupt controller to mask all interrupts, which would permit you to then enable the CPU interrupts without receiving any. Not really sure the point in that, when you could just leave the CPU ignoring interrupts.
To truly clear the pending interrupts, you need to invoke the device specific code (ie. interrupt handler) for each device with a pending interrupt. You could look through the status bits of the GIC, identify each pending interrupt, then look through the kernel's interrupt structure to determine the relevant device and invoke its handler. It is a lot easier to just turn interrupts back on.
If you disable interrupts, there will probably be a pending interrupt that's been sent to your CPU from the PIC that it's waiting for you to acknowledge. So before you re-enable interrupts, you'd have to tell the PIC to de-assert this interrupt if present.
While the PIC was waiting for acknowledgment, it may have been buffering other interrupts (or sending them to other CPUs). So you'd need to tell the PIC to clear these if present, or wait a sufficient amount of time for other CPUs to handle all these interrupts. This is assuming of course that the interrupts are being distributed evenly and no interrupt is biased towards your CPU.
I have a level HIGH interrupt hardware device and have a working interrupt handler in linux using register_irq();
The problem is, if I register the IRQ while the device has already raised the level high interrupt, the handler doesn't get called.
If I have the device then lower the interrupt, and re-raise it, then my handler will get called.
This seems like a bug to me, that you can only get an interrupt for level interrupts if you register before the hardware moves the line high.
Can anyone confirm this is normal behavor and if not, how to fix it?
I am writing a Linux device driver which needs to wait for an interrupt (triggered by changes in a GPIO line), and, once the interrupt happens, disable the interrupt until certain conditions are met.
I have tried calling disable_irq_nosync from the handler. Later, when I want to process this interrupt again, I would call enable_irq to reenable it. However I have found that if the GPIO changes while the interrupt is disabled, this seem to be internally detected by the kernel and would result in the interrupt firing immediately as soon as I call enable_irq.
Why is this happening, and how can I avoid it?
I have been working on irq handlers using the regmap irq chip implementation.
I have seen that there is high incosistency with the irq handlers execution. Especially if the irq is generated continuously during suspend. The irq chokes and never clears the interrupt source i.e handler never runs at times. Even if the handler runs half way and the system sleeps, it does not continue on resume.
Its creating serious issues. How do I handle this?
Regmap entirely uses threaded irqs. In addition, I was using i2c calls in the nested calls which are again threaded irqs. Due to this, I would always remain in user space and not in irq context. I2c tranfer has schedule in it and that brings in a completely different execution flow. In addition, there were problems in wake enabling the irq.
I'm trying to better understand the interaction between the "return IRQ_HANDLED" statement used in a GPIO pin-based interrupt handler (top-half) and the GPIO pin hardware. In particular, consider the hypothetical situation wherein a device has pulled a GPIO pin low to indicate that it needs attention. This causes the associated (top half) interrupt handler to be invoked. Now assume that the top-half handler queues up some work and then returns with "return IRQ_HANDLED" but that for whatever reason the interrupt has not been cleared on the device that generated it (i.e. the device is holding the GPIO pin in the low state). Does invocation of "return IRQ_HANDLED" cause the interrupt to be regenerated? I ask this in the context of the following article:
http://www.makelinux.net/books/lkd2/ch06lev1sec4
"Reentrancy and Interrupt Handlers
Interrupt handlers in Linux need not be reentrant. When a given interrupt handler is executing, the corresponding interrupt line is masked out on all processors, preventing another interrupt on the same line from being received. Normally all other interrupts are enabled, so other interrupts are serviced, but the current line is always disabled. Consequently, the same interrupt handler is never invoked concurrently to service a nested interrupt. This greatly simplifies writing your interrupt handler."
The above comment indicates that upon invocation of an interrupt handler, the interrupt line for that interrupt is masked. I'm trying to figure out if the invocation of "return IRQ_HANDLED" is what unmasks the interrupt line. And, with respect to the hypothetical case described above, what would happen if I "return IRQ_HANDLED" yet the device has not really had its interrupt cleared and hence is still holding the GPIO pin in a low (triggered) state. More specifically, will this cause the interrupt to be generated again such that the processor never has a chance to do the work queued when the interrupt first occurred. I.e., would this lead to an interrupt storm wherein the processor could be interrupted endlessly thus not allowing any useful processing to occur. I should add that I ask this question in the context of a single CPU linux ARM9 system (Phytec LPC3180) running kernel 2.6.10.
Thanks in advance,
Jim
PS: I'm not clear as to the difference between enabling/disabling an interrupt (in particular, an interrupt associated with a particular GPIO pin) and masking/unmasking the same GPIO interrupt.