Trying to make makefile to turn all .c into execute files in directory.
For example:
am.c
2.c
s.c
into
am
2
s
programs.
Anything works,but it uses cc, but I want to use gcc compiler.
How can I do that?
SRC = $(wildcard *.c)
BIN = $(patsubst %.c,%,$(SRC))
all : $(BIN)
Add a line to the top saying
CC = gcc
Related
I'm starting with creating Makefile. I write simple Makefile, which create two library, static and dynamica and use to compile executable file. The files for the operation of the program are in individual folders: *.c in src, *.h in include,
*.a and *.so in lib and executable file in bin. The rest are in the makefile folder. My Makefile create all files but cant find files. I use VPATH, and -L in gcc. But that's not work. I'm working on Ubuntu 20.04 LTS. Thanks for all help.
vpath %.c src
vpath %.h include
vpath %.a lib
vpath %.so lib
%.o: %.c
gcc -c $<
%: %.o
gcc -o ./bin/$# $^ -L./lib -I./bin
libj%.a: %j.o
ar rs ./lib/$# $^
lib%r.so: p%.o
gcc -shared -o ./lib/$# $^ -L./lib
prog: prog.o libjp.a libgr.so
prog.o: prog.c libgr.h libjp.h
libjp.a: pj.o pp.o
pj.o: pj.c
pp.o: pp.c
libgr.so: pg.o pr.o
pg.o: pg.c
pr.o: pr.c
I don't understand what you mean by "in which folder", you have to do it your shell before you run your program.
So, if you run this:
$ make
$ ./bin/prog
and you get an error, you should use this:
$ make
$ export LD_LIBRARY_PATH=$(pwd)/lib
$ ./bin/prog
Do NOT put the setting of LD_LIBRARY_PATH inside the makefile as I mentioned above in my comments.
I'm trying to compile a C library in a Linux Ubuntu environment (and that will be used by a Embedded Linux program), but when I do a make on it, I get a .lib instead of a .a file even thought it seems that there is no place in the Makefile that commands such a change (a would expect that compiling a library in Ubuntu would produce a .a file by default!).
What follows is the Makefile being used fro this library (the result now being calculos.lib):
Makefile
# ----------------------------------------------------------------------------
# Name of the ARM GCC cross compiler & archiver
# ----------------------------------------------------------------------------
ARM_TOOLCHAIN_PREFIX = arm-arago-linux-gnueabi-
ARM_TOOLCHAIN_PATH = /re8k/linux-devkit
ARM_CC := $(ARM_TOOLCHAIN_PATH)/bin/$(ARM_TOOLCHAIN_PREFIX)gcc
ARM_AR := $(ARM_TOOLCHAIN_PATH)/bin/$(ARM_TOOLCHAIN_PREFIX)ar
# Get any compiler flags from the environment
ARM_CFLAGS = $(CFLAGS)
ARM_CFLAGS += -std=gnu99 \
-Wdeclaration-after-statement -Wall -Wno-trigraphs \
-fno-strict-aliasing -fno-common -fno-omit-frame-pointer \
-c -O3
ARM_LDFLAGS = $(LDFLAGS)
ARM_LDFLAGS+=-lm -lpthread
ARM_ARFLAGS = rcs
# ----------------------------------------------------------------------------
# Name of the DSP C6RUN compiler & archiver
# TI C6RunLib Frontend (if path variable provided, use it, otherwise assume
# the tools are in the path)
# ----------------------------------------------------------------------------
C6RUN_TOOLCHAIN_PREFIX = c6runlib-
C6RUN_TOOLCHAIN_PATH = $(ARM_TOOLCHAIN_PATH)/c6run
C6RUN_CC := $(C6RUN_TOOLCHAIN_PATH)/bin/$(C6RUN_TOOLCHAIN_PREFIX)cc
C6RUN_AR := $(C6RUN_TOOLCHAIN_PATH)/bin/$(C6RUN_TOOLCHAIN_PREFIX)ar
C6RUN_CFLAGS = -c -mt -O3
C6RUN_ARFLAGS = rcs
# ----------------------------------------------------------------------------
# List of lib source files
# ----------------------------------------------------------------------------
LIB_SRCS := calculos.c
LIB_DSP_OBJS := $(LIB_SRCS:%.c=dsp_obj/%.o)
LIB_OBJS := $(LIB_DSP_OBJS:%.o=%.lib)
all: dsp_obj/.created
$(C6RUN_CC) $(C6RUN_CFLAGS) -o $(LIB_DSP_OBJS) $(LIB_SRCS) -DUSE_DSP;
$(C6RUN_AR) $(C6RUN_ARFLAGS) $(LIB_OBJS) $(LIB_DSP_OBJS);
all_host: dsp_obj/.created
gcc -c -o $(LIB_DSP_OBJS) $(LIB_SRCS);
ar rcs $(LIB_OBJS) $(LIB_DSP_OBJS);
dsp_obj/.created:
#mkdir -p dsp_obj
#touch dsp_obj/.created
clean:
rm -rf dsp_obj;
distclean: clean
So the question is: how should I configure my Makefile so it will produce a .a file instead of a .lib?
The line that causes the .lib extension is LIB_OBJS := $(LIB_DSP_OBJS:%.o=%.lib) which replaces .o in each file in LIB_DSP_OBJS with .lib.
Change the .lib to .a in that line and see if that does what you need.
i am new to makefiles and have just rescently created a makefile that works for a c++ project. it has two cpp files and one h file. i am trying to convert my file to work in linux but cant seem to figure out how. any ideas?
EXE = NumberGuessingGame.exe
CC = cl
LD = cl
OBJ = game.obj userInterface.obj
STD_HEADERS = header.h
CFLAGS = /c
LDFLAGS = /Fe
$(EXE): $(OBJ)
$(LD) $(OBJ) $(LDFLAGS)$(EXE)
game.obj: game.cpp $(STD_HEADERS)
$(CC) game.cpp $(CFLAGS)
userInterface.obj: userInterface.cpp $(STD_HEADERS)
$(CC) userInterface.cpp $(CFLAGS)
#prepare for complete rebuild
clean:
del /q *.obj
del /q *.exe
For in depth treatment of make on Linux, see GNU make.
There are a few differences. Binaries have no extension
EXE = NumberGuessingGame
The compiler is gcc, but need not be named, because CC is built in, same goes for LD. But since your files are named .cpp, the appropriate compiler is g++, which is CXX in make.
Object files have extension .o
OBJ = game.o userInterface.o
STD_HEADERS = header.h
Compiler flags
CXXFLAGS = -c
The equivalent for /Fe is just -o, which is not specified as LDFLAGS, but spelled out on the linker command line.
Usually, you use the compiler for linking
$(EXE): $(OBJ)
$(CXX) $(LDFLAGS) $(OBJ) -o $(EXE)
You don't need to specify the rules for object creation, they are built in. Just specify the dependencies
game.o: $(STD_HEADERS)
userInterface.o: $(STD_HEADERS)
del is called rm
clean:
rm -f $(OBJ)
rm -f $(EXE)
One important point is, indentation is one tab character, no spaces. If you have spaces instead, make will complain about
*** missing separator. Stop.
or some other strange error.
You can also use CMake to accomplish your task:
Put following into CMakeLists.txt file in the root directory of your project (<project-dir>):
cmake_minimum_required (VERSION 2.6)
project (NumberGuessingGame)
add_executable(NumberGuessingGame game.cpp serInterface.cpp)
Then on the console do
"in-source" build
$ cd <project-dir>
$ cmake .
$ make
or "out-source" build
$ mkdir <build-dir>
$ cd <build-dir>
$ cmake <project-dir>
$ make
You can adjust build setting using nice GUI tool. Just go to the build directory and run cmake-gui.
You don't need to include headers in the dependency list. The compiler will fail on its own, stopping make from continuing. However, if you're including them in the dependency list to force make to rebuild files in case the header changes, nobody will stop you.
CFLAGS never needs to contain -c, nor does LDFLAGS need -o. Below is a revamped makefile. Note that you can always override a macro explicitly defined in a makefile or implicitly defined using something like make CFLAGS=-Wall for example. I used the de facto standard CXX macro name in the event that you have C source files, which must be compiled using a C compiler (the value of the CC macro) instead of a C++ compiler.
.POSIX:
#CC is already implicitly defined.
CXX = g++
OBJ = game.o userInterface.o
STD_HEADERS = header.h
.SUFFIXES:
.SUFFIXES: .o .cpp .c
NumberGuessingGame: $(OBJ) $(STD_HEADERS)
$(CXX) $(CFLAGS) -o $# $(OBJ) $(LDFLAGS)
.cpp.o: $(STD_HEADERS)
$(CXX) $(CFLAGS) -c $<
#There is already an implicit .c.o rule, thus there is no need for it here.
#prepare for complete rebuild
clean:
-rm -f NumberGuessingGame *.o
As yegorich answered, you can use a build system like Cmake. It is much more flexible, cross-platform, and can generate Unix Makefiles as well as Nmake Makefiles and Visual Studio solutions on Windows.
I use to use this simple Makefile to compile all .cc files in the current directory
SRCS:=$(wildcard *.cc)
OBJS:=$(SRCS:.cc=)
CXX := clang++
CXXFLAGS := -std=c++11 -g
all: $(OBJS)
I'm trying to translate this into an SConstruct file. I can use scons' Glob built-in to get the .cc file list but I don't know how to remove their suffix (like the OBJS := $(SRCS:.cc=) do). Of course I can write Python code to do the modification but does scons has built-in support for this kind of modification?
UPDATE:
My original SConstruct file (literally list all the .cc files)
env = Environment(CXX="clang++", CXXFLAGS=['-std=c++11', '-g'])
env.Program("1.1.cc")
env.Program("1.2.cc")
env.Program("1.3.cc")
env.Program("1.4.cc")
One version that works
import glob
env = Environment(CXX="clang++", CXXFLAGS=['-std=c++11', '-g'])
sources = glob.glob("./*.cc")
for s in sources:
env.Program(s)
Based on your response to my question in the comments above, it appears that you want SCons to automatically create a binary or object file based on the source file.
This can be done in SCons as follows:
env = Environment()
# This will build example.o
env.Object('example.cc')
# This will build main
env.Program('main.cc')
Here is the output from this build:
$ scons
scons: Reading SConscript files ...
scons: done reading SConscript files.
scons: Building targets ...
g++ -o example.o -c example.cc
g++ -o main.o -c main.cc
g++ -o main main.o
scons: done building targets.
If you need to build a binary with more than one source file, then you will need to specify the binary name, as follows:
Program(target = 'myBinary', source = ['main.cc', 'example.cc'])
This will create main.o and example.o, but cant know the name of the binary/program, so you have to specify it.
As for your example with glob, Scons has a built-in Glob() function, so you could do the following:
env = Environment(CXX="clang++", CXXFLAGS=['-std=c++11', '-g'])
sources = Glob("./*.cc")
for s in sources:
env.Program(s)
The SCons Glob() function is not recursive, so if you need to recursively list files, then you'll need to do it differently.
I'm working on a Linux kernel module for a 2.6.x kernel and I need to view the assembly output, though it's currently being done as a temporary file an deleted afterwords. I'd like to have the assembly output mixed with my C source file so I can easily trace where my problem lies. This is for an ARMv6 core and apparently objdump doesn't support this architecture. I've included my makefile below.
ETREP=/xxSourceTreexx/
GNU_BIN=$(ETREP)/arm-none-linux-gnueabi/bin
CROSS_COMPILE := $(GNU_BIN)/arm-none-linux-gnueabi-
ARCH := arm
KDIR=$(ETREP)/linux-2.6.31/
MAKE= CROSS_COMPILE=$(CROSS_COMPILE) ARCH=$(ARCH) make
obj-m += xxfile1xx.o
all:
$(MAKE) -C $(KDIR) M=$(PWD) modules
clean:
$(MAKE) -C $(KDIR) M=$(PWD) clean
Objdump does support that architecture. Your executable will be called arm-none-linux-gnueabi-objdump
Assuming gcc and the gnu assembler a more readable output than objdump can be had. Tell the assembler to retain its intermediate code using flags to gcc:
-Wa,-alh=basename.s
And to get basename to be the actual source filename you need to tell make:
-Wa,-alh=$<.s
which will leave piles of foo.c.s files laying around your source directory. The big problem here is that the way gcc works it uses temporary files between code generation and assembly. I can't find a way to make gcc save its intermediates but the assembler is happy to stash a listing for you.
Getting that argument into the Makefile CFLAGS is left as an exercise for the reader (because I kinda hate "make" and hate "gnu info" even more.
To get an assembly language listing of my Linux kernel modules, I added the assembler switches to the kernel scripts/Makefile.build.
#cmd_cc_o_c = $(CC) $(c_flags) -c -o $(#D)/.tmp_$(#F) $<
cmd_cc_o_c = $(CC) $(c_flags) -c -Wa,-alh=$<.lst -o $(#D)/.tmp_$(#F) $<
You could try the flag "-save-temps" to gcc.
It works for me in my embedded project, I haven't tried it on kernel builds.
The proper way is likely to add target dependencies in your module makefile / Kbuild file:
always-m += basename.s
(As kbuild has the proper targets to generate the .s files)
If you are lazy as I am, this could look like:
MOD_NAME := some_module_name
myunits := file1 file2 file3 ... and many more... without .c extension
obj-m := $(MOD_NAME).o
$(MOD_NAME)-y := $(addsuffix .o,$(myunits))
# Comment/uncomment to generate assembly / preprocessor output
always-m += $(addsuffix .s,$(myunits)) $(MOD_NAME).mod.s
always-m += $(addsuffix .i,$(myunits)) $(MOD_NAME).mod.i
(2 bonuses here: assembly for the generated module meta-registration file, and the preprocessor output)