Pass an extra parameter to make - linux

Question

I have a Makefile like this:
baud=19200
src=dimmer
avrType=attiny13
programmerDev=/dev/ttyUSB003
programmerType=stk500v1
object:
avr-gcc -g -DF_CPU=$(avrFreq) -Wall -Os -mmcu=$(avrType) -c -o $(src).o $(src).cpp
read:
#for memory in calibration eeprom efuse flash fuse hfuse lfuse lock signature application apptable boot prodsig usersig; do \
avrdude -p $(avrType) -c$(programmerType) -P$(programmerDev) -b$(baud) -v -U $$memory:r:./$(avrType).$$memory.hex:i; \
done
Which works as intended. When I type make read several files are extracted from the microcontroller. This can take a little while because of the slow connection and data size, so I was thinking it would be nice to be able to just type make read flash, but I can't figure out how to do that.
Of course I can make entries like read_flash, read_hfuse ... but I have a feeling it can be done smarter.
I also want to be able to run a command like make read all which will execute every file in turn from the controller.
Now I am new to creating Makfile's, so maybe I am on the wrong track all together. Please feel free to explain how it should be done.
I am on Linux.

Answer 1

If a highly GNU-specific makefile is acceptable to you (and I'd argue that it's much better to use a portable make, such as GNU's, than writing portable makefiles), you can implement this rather easily:
ALL = calibration eeprom efuse flash fuse hfuse lfuse lock signature \
application apptable boot prodsig usersig
ifeq (read,$(firstword $(MAKECMDGOALS)))
WANT := $(wordlist 2,$(words $(MAKECMDGOALS)),$(MAKECMDGOALS))
ifneq ($(WANT),)
$(eval $(WANT):;#:)
endif
UNKNOWN := $(filter-out $(ALL),$(WANT))
ifneq ($(UNKNOWN),)
$(error Invalid arguments: $(UNKNOWN))
endif
endif
read-one = avrdude -p $(avrType) -c$(programmerType) -P$(programmerDev) \
-b$(baud) -v -U $1:r:./$(avrType).$1.hex:i
.PHONY: read
read:
$(foreach w,$(or $(WANT),$(ALL)),$(call read-one,$w) &&) :
If the first argument in the command line is "read", this sets the WANT variable to the list of arguments after the first. It then turns those names into no-op targets and makes the read target invoke the read-one function for each name, or for $(ALL) if no name was specified.
I use variations of this quite often, for things like make print VARIABLE..., which will just print $(VARIABLE) or make help TOPIC to display information about a target.

Answer 2

What about making the list of modules a configurable list with a default:
LIST = calibration eeprom efuse flash fuse \
hfuse lfuse lock signature application \
apptable boot prodsig usersig
read:
#for memory in $(LIST); do \
avrdude -p $(avrType) -c$(programmerType) -P$(programmerDev) \
-b$(baud) -v -U $$memory:r:./$(avrType).$$memory.hex:i; \
done
And then call make either as make for the default, or make LIST="eeprom efuse" for just two modules.

Answer 3

I would do: make flash or make hfuse or make all with the following Makefile:
baud=19200
avrType=attiny13
programmerDev=/dev/ttyUSB003
programmerType=stk500v1
all: calibration eeprom efuse flash fuse hfuse lfuse lock signature \
application apptable boot prodsig usersig
%:
avrdude -p $(avrType) -c$(programmerType) -P$(programmerDev) -b$(baud) \
-v -U $#:r:./$(avrType).$$memory.hex:i || rm ./$(avrType).$#.hex;
This is probably not portable Make, but it works in gnu make. This does not allow any other rules, but you could name this file read and do make -f read flash. That would allow other rules to be placed in other make files.
Notice that this is not particularly safe, since it will run avrdude on make foo. To get tighter control of the targets, you can do:
.SUFFIXES: .ph
.PHONY: efuse.ph eeprom.ph ...
all: efuse eeprom ...
.ph:
avrdude ...
This way, only the targets listed as PHONY will be valid targets.