I want to build programs in the inbuilt build command of sublime text 2
I've made a gcc.sublime-build file with
{
"cmd" : ["gcc", "$file_name", "-o", "${file_base_name}"],
"selector" : "source.c",
"shell":true,
"working_dir" : "$file_path"
}
but all i get is an error saying
gcc: fatal error: no input files
compilation terminated.
[Finished in 0.0s with exit code 4]
any ideas
Sublime Text is executing gcc without parameters because "shell": true means that the value of "cmd" is passed to a shell, and it should be one string. In your file it appears that you want to pass parameters directly to GCC, so you should set "shell" to false.
I would do this with a Makefile:
CC=gcc
all: source
Then, type make.
Related
I'm new to Linux & shell and I'm struggling with checking if the compilation is successful.
g++ code.cpp -o code.o 2>error.txt
if [ ! -e error.txt ]
then
do something
else
echo "Failed to compile"
I guess an error file is created even if the compilation is successful. What is the content of the error file when there is no error? I need to change the if condition to check if the compilation is successful.
It's just the order of things. What happens when the shell parses the string g++ code.cpp -o code.o 2>error.txt is:
The shell creates error.txt, truncating the file if that name already exists.
g++ is called with its error output redirected to the new file.
If g++ does not write any data, then the file remains as it was (empty) at the end of step 1.
You probably aren't so much interested in the error file as you are the return value. You probably ought to just do:
if g++ code.cpp -o code; then : do something; done
or even just:
g++ code .cpp -o code && : do something
but if really want to do something else with the errors, you can do:
if g++ code.cpp -o code.o 2> error.txt; then
rm error.txt
: do something
else
echo >&2 Failed to compile code.cpp.\ See "$(pwd)"/error.txt for details.
fi
Make sure you escape at least one of the spaces after the . so that you get 2 spaces after the period (or just quote the whole argument to echo). Although it's become fashionable lately to claim that you only need one space, all of those arguments rely on the use of variable width fonts and any command line tool worth using will be used most often in an environment where fixed width fonts are still dominant. This last point is totally unrelated to your question, but is worth remembering.
Command :
`gcc -c -Wall hello.c`
Here is the error : while calling ./hello.o
bash: ./hello.o: cannot execute binary file: Exec format error
need help please ..
.o is an object file, not an executable. It's an intermediate step. The -c option just says to make that step. You'll still have to link that object file into an executable.
These are the options you are asking for
-c
Compile or assemble the source files, but do not link. The linking stage simply is not done. The ultimate output is in the form of an object file for each source file.
By default, the object file name for a source file is made by replacing the suffix ‘.c’, ‘.i’, ‘.s’, etc., with ‘.o’.
Unrecognized input files, not requiring compilation or assembly, are ignored.
-o file
Place output in file file. This applies to whatever sort of output is being produced, whether it be an executable file, an object file, an assembler file or preprocessed C code.
If -o is not specified, the default is to put an executable file in a.out, the object file for source.suffix in source.o, its assembler file in source.s, a precompiled header file in source.suffix.gch, and all preprocessed C source on standard output.
Using the first option you will have an object file, not an executable so you cannot execute it
I create a binary myBinary via cmake/CMakeLists.txt.
I would like to "include" default options on my binary.
In other words, I want my binary to be called with myBinary --option myopt even when I just run ./myBinary
How can I do that?
CMake does not have built-in support for you you want to do.
One solution is to do as #Youka said - change the source code of your program.
Another solution that I have used sometimes is to autogenerate a script that executes an executable:
# Create startup script
MACRO(GEN_START_SCRIPT binName)
# Generate content
SET(fileContent
"#!/bin/bash\n"
"\n"
"# This startup script is auto generated - do not modify!\n"
"\n"
"${binName} -a 23 -b 34 -c 976\n"
"\n"
)
# Write to file
SET(fileName ${CMAKE_CURRENT_BINARY_DIR}/${binName}.sh)
FILE(WRITE ${fileName} ${fileContent})
ENDMACRO()
Then call the macro after defining your executable:
ADD_EXECUTABLE(myBinary file1.c file.2)
GEN_START_SCRIPT(myBinary)
You can of course add other stuff to the script, like environment variables etc.
If you're in control of the sources and you want different default behavior... change the sources!
This is in no way a build system issue (CMake or otherwise).
I am new to makefile, I am trying to add a make debug mode.
I have the following:
CXXFLAGS=-Wall -c
debug: $(EXECUTABLE)
CXXFLAGS+=-pg
all:
....
for some reason it assigns it and when I put make debug it give me
CXXFLAGS+=-pg
/bin/sh: CXXFLAGS+=-pg: not found
make: *** [debug] Error 127
Is there any way to do and avoid writing the entire all command again in the debug except with -pg flags?
I tried to remove debug: target
and CXXFLAGS was concatenated with -pg flags successfully
If you are using gnumake, just add:
debug: CXXFLAGS += -pg
debug: $(EXECUTABLE)
Note that it is typical to define all first so that it is the default. If the rules for debug appear before all in the Makefile, debug becomes the default (if it is first).
All tab-indented lines below a target are piped directly to shell subprocesses, but your CXXFLAGS line is using Makefile syntax, not valid shell syntax.
Worse, even if you used shell syntax, setting the variable wouldn't carry over to lines executed under a different target; they would only affect shell commands under the same target, and then, only if all the lines are joined with \ escape characters.
Make will read the values from environment variables, so you could set the environment variable as you run make, e.g. (Bourne-family shells):
myprompt$ CXXFLAGS=" -pg $CXXFLAGS" make
I am new to Linux and makefiles. I have a makefile which generates .a files.
When I run the makefile, I get the following error. I have no idea from which part of the code, the error occurs.
[oracle#dyl02703app004 erm]# make -f erm_make_ida all
.... Compiling /home/wholesale/children/dev5/comps/erm/obj/ermparseyac.c
cc -g -DANSI -D -DTRACE_ON -DIDA_VERSION='"ISP-RG-V5.10.7GEN2A"' -DNO_MCP -DBUILDING_ERP -I/home/wholesale/children/dev5/comps/erm/include -I/home/wholesale/children/dev5/comps/erm/src -I/home/wholesale/children/dev5/comps/erm/module_test -I/home/wholesale/children/dev5/comps/erm/include -I/home/wholesale/children/dev5/comps/cfm/include -c /home/wholesale/children/dev5/comps/erm/src/ermparseyac.c -o /home/wholesale/children/dev5/comps/erm/obj/ermparseyac.o
<command line>:1:1: error: macro names must be identifiers
make: *** [/home/wholesale/children/dev5/comps/erm/obj/ermparseyac.o] Error 1
Any suggestions...?
You have a -D flag with no name. Look in your makefile to see what is causing it.