In one of Intels IP Cores datasheet they do conversion from byte (0x17ff) to 32-bit (0x5ff) and I would like to know how they do that (from Parameter Editor Adress to Avalon-MM Address), an example would be great.
It's just a division by 0x100 (4), i.e. a bitshift to the right by two bits.
0x1800 / 4 = 0x600
0x3000 / 4 = 0xC00
Which makes sense, because 32 bits are four bytes. You'll see as well that there are four times as many byte addresses as there are 32-bit addresses for the same reason.
Related
If I have say a 64-bit instruction, which has 2 bytes (16 bits) for opcode and the rest for operand address, I can determine that I have 48bits for the address (64-16). The maximum value that can be displayed with 48 bits plus 1 to account for address 0 is my go to number. This would be 2^48. However, I have the problem with the understanding of this in terms of the iB units.
2^48 is 2^40 (TiB) x 2^8 = 256TiB. But since TiB = 2^40 BYTES, when did the 2^48 become a BYTE? I generally believed that to get the number of bytes I'd have to divide by 8, but this doesn't seem to be the case.
Could someone explain why this works?
A byte is by definition the smallest chunk of memory which has an address. Whatever number of address bits, the resulting address is the address of a byte, by definition. In all (or at least, most) computer architectures existing today, a byte is the same as an octet, that is, eight bits; but historically there were popular computer architectures with 6 bit bytes, or 12 bit bytes, or even other more exotic number of bits per byte.
LDA is a simple opcode that loads to accumulator (register a) the pointed data in intel 8080 processor. In this condition (0x3a LDA addr) it says that op loads the addr to accumulator. But i couldn't recognize what it specifyies as addr.
A <- (adr) is the operation which 0x3a does and it uses 3 bytes of memory. I could store the data in the last 2 bytes of op as hi add and low add in a stack but accumulator is only 1 byte so i can't. Thanks.
LDA a16 instruction reads a byte from address a16 (the 8080 has a 16-bit bus) and stores that value into the A register.
This instruction is encoded as three : 0x3a lo hi, being lo and hi the two bytes that compose the address.
If you want to store an immediate (constant) value into A you should use instead instruction MVI A, x, being x the constant value. This instruction is encoded as: 0x3e x, only two bytes, as you seem to expect.
It looks like you are confusing memory address and memory content. The 8080 has an address bus of 16 bits and a data bus of 8 bits. That means that it can access memory from address 0x0000 up to 0xffff (16 full bits), or 65536 different addresses, but each of these address can store a single byte, with a value from 0x00 to 0xff (8 bits). That adds up to 64 kilobytes of memory.
Now, when you want to read a value from memory you need to specify the address of the value you are reading (remember, the address is 16 bits, the value is 8 bits). So you have to encode somehow the address into the instruction using 2 bytes. Intel CPU use the little-endian scheme, so to encode an address the lower 8 bits are stored in the first byte and the higher 8 bits in the second one. And that is what the LDA opcode does, and that is why it is 3 bytes long.
"A memory has 1024 storage units with a width of 64. Suppose the memory is byte addressable. What is the address of the highest addressable memory position?"
Please correct me if I'm wrong.
byte addressable means individual bytes in a word have their own addresses.
there are 8 bytes in a 64 bit word.
therefore 8 x 1024 = 8192 addresses overall.
highest address therefore 8191.
I believe this to be true but am not a 100% sure. Please indicate where my logic falters if indeed it does.
I would say 1023.
There are 1024 storage locations, each numbered 0 to 1023, and each storage location holding 64 bits.
So you have a computer where a byte contains 64 bits. A byte is not 8 bits, but the minimum size of a memory location. All modern computers use 8 bits on a byte, but some older computers used 7, 9 og 14 bits on each byte.
But it's a really badly written question, because it does not define what a storage location is. So your interpretation might be right assuming a standard 8 bit in a byte cpu.
What I understand so far is address width is the number of bits in an address.
For example, 4 bits width address can have 2^4 = 16 cases. And what I'm really uncertain is addressability. Based on what I learned is "the size of the most basic unit that can be named by address". So, if we have 4 bits address width and 2 bits addressability, what happens?
I've been really curious about it for a couple of weeks, but still bummer.
Could you guys explain those things by drawing or something?
I think you do get it. There is the number of address bits, the width if you will, and there is the size of the unit those things address. so 8 bits means you have 256 things, 16 bits of address 65536 things. The size of thing is completely independent of the number of address bits. From a programmers perspective almost always we deal in units of bytes, so 8 bits of address would be 256 bytes, 32 bits of address would be 4 gigabytes. As you dig into the logic it is often wasteful to use a byte based address, if you have a peripheral that has 32 bit wide registers and you can only access those as whole 32 bit registers then do you need to connect address line 0 or 1? often not. so at that peripheral the address bus however wide it is (often the whole address bus to the peripheral is a subset of the address bus higher up closer to the processor/software, and those address bits are in units of 32 bit words.
To make things even more confusing, memory parts are often defined in terms of bits, even if they have an 8 or 16 bit data bus. So you might have a 4M part but that is megabits not megabytes...
I think I'm getting the Mod R/M byte down but I'm still confused by the effective memory address/scaled indexing byte. I'm looking at these sites: http://www.sandpile.org/x86/opc_rm.htm, http://wiki.osdev.org/X86-64_Instruction_Encoding. Can someone encode an example with the destination address being in a register where the SIB is used? Say for example adding an 8-bit register to an address in a 8-bit register with SIB used?
Also when I use the ModR/M byte of 0x05 is that (*) relative to the current instruction pointer? Is it 32 or 64 bits when in 64 bit mode?'
Is the SIB always used with a source or destination address?
A memory address is never in an 8-bit register, but here's an example of using SIB:
add byte [rax + rdx], 1
This is an instance of add rm8, imm8, 80 /0 ib. /0 indicates that the r field in the ModR/M byte is zero. We must use a SIB here but don't need an immediate offset, so we can use 00b for the mod and 100b for the rm, to form 04h for the ModR/M byte (44h and 84h also work, but wastes space encoding a zero-offset). Looking in the SIB table now, there are two registers both with "scale 1", so the base and index are mostly interchangeable (rsp can not be an index, but we're not using it here). So the SIB byte can be 10h or 02h.
Just putting the bytes in a row now:
80 04 10 01
; or
80 04 02 01
Also when I use the ModR/M byte of 0x05 is that (*) relative to the current instruction pointer? Is it 32 or 64 bits when in 64 bit mode?
Yes. You saw the note, I'm sure. So it can be either, depending on whether you used an address size override or not. In every reasonable case, it will be rip + sdword. Using the other form gives you a truncated result, I can't immediately imagine any circumstances under which that makes sense to do (for general lea math sure, but not for pointers). Probably (this is speculation though) that possibility only exists to make the address size override work reasonably uniformly.
Is the SIB always used with a source or destination address?
Depends on what you mean. Certainly, if you have a SIB, it will encode a source or destination (because what else is there?) (you might argue that the SIB that can appear in nop rm encodes nothing because nop has neither sources nor destinations). If you mean "which one does it encode", it can be either one. Looking over all instructions, it can most often appear in a source operand. But obviously there are many cases where it can encode the destination - example: see above. If you mean "is it always used", well no, see that table that you were looking at.