No rule to make target f1.o, needed by f90_simple - linux

I have the following makefile. It works well for .f and .c files but when I have .f90 file and want to compile it with ifort does not work?
Could you please advise me where I should change and how?
Thanks you
FCOMPFLAGS = -O -ffixed-line-length-132
CCOMPFLAGS = -O
FFLAGS = $(FCOMPFLAGS) -fsecond-underscore
CFLAGS = $(CCOMPFLAGS)
LDFLAGS = $(FCOMPFLAGS)
LD = gfortran
FC = gfortran
MAKEFILE = Makefile
PROGRAM1 = f1
OBJS = f1.o \
f2.o \
f3.o
all: $(PROGRAM1)
$(PROGRAM1): $(OBJS) $(MAKEFILE)
$(LD) $(LDFLAGS) $(OBJS) -o $(PROGRAM1)
clean: #rm -f $(OBJS) core
when I execute "make" I get the following error,
make: *** No rule to make target `f1.o', needed by `f90_simple'. Stop.
It seems that My makefile does not recognize *.f90 files, and my other question is do we have flag for ifrot compiler to be used in makefile
Thanks

You need to add the implicit rule:
%.o : %.f90
<tab>$(FC) $(FCOMPLAGS) -c $<

Related

how to write recipe for the makefile in yocto

I am trying to add this package called sane-airscan to my yocto build. My experience with yocto is very basic.I do not know how to write a recipe for this one
This is the MakeFile for the above mentioned one
# USER-SETTABLE VARIABLES
#
# The following variables can be overridden by user (i.e.,
# make install DESTDIR=/tmp/xxx):
#
# Name Default Description
# ---- ------- -----------
# DESTDIR Destination directory for make install
# PREFIX Non-standard: appended to DESTDIR
# CC gcc C compiler
# CPPFLAGS C preprocessor flags
# CFLAGS -O2 -g -W -Wall -Werror C compiler flags
# LDFLAGS Linker flags
# COMPRESS gzip Program to compress man page, or ""
# MANDIR /usr/share/man/ Where to install man page
CC = gcc
COMPRESS = gzip
CFLAGS = -O2 -g -W -Wall -Werror
MANDIR = /usr/share/man/
PKG_CONFIG = /usr/bin/pkg-config
# These variables are not intended to be user-settable
OBJDIR = objs/
BINDIR = /usr/bin
CONFDIR = /etc/sane.d
LIBDIR := $(shell $(PKG_CONFIG) --variable=libdir sane-backends)
BACKEND = libsane-airscan.so.1
DISCOVER = airscan-discover
LIBAIRSCAN = $(OBJDIR)/libairscan.a
MAN_DISCOVER = $(DISCOVER).1
MAN_DISCOVER_TITLE = "SANE Scanner Access Now Easy"
MAN_BACKEND = sane-airscan.5
MAN_BACKEND_TITLE = "AirScan (eSCL) and WSD SANE backend"
DEPENDS := avahi-client avahi-glib libjpeg libsoup-2.4 libxml-2.0
DEPENDS += libpng
# Sources and object files
SRC = $(wildcard airscan-*.c) sane_strstatus.c
OBJ = $(addprefix $(OBJDIR), $(SRC:.c=.o))
# Obtain CFLAGS and LDFLAGS for dependencies
airscan_CFLAGS = $(CFLAGS)
airscan_CFLAGS += -fPIC
airscan_CFLAGS += $(foreach lib, $(DEPENDS), $(shell pkg-config --cflags $(lib)))
airscan_LIBS := $(foreach lib, $(DEPENDS), $(shell pkg-config --libs $(lib))) -lm
airscan_LDFLAGS = $(LDFLAGS)
airscan_LDFLAGS += $(airscan_LIBS)
airscan_LDFLAGS += -Wl,--version-script=airscan.sym
# This magic is a workaround for libsoup bug.
#
# We are linked against libsoup. If SANE backend goes unloaded
# from the memory, all libraries it is linked against also will
# be unloaded (unless main program uses them directly).
#
# Libsoup, unfortunately, doesn't unload correctly, leaving its
# types registered in GLIB. Which sooner or later leads program to
# crash
#
# The workaround is to prevent our backend's shared object from being
# unloaded when not longer in use, and these magical options do it
# by adding NODELETE flag to the resulting ELF shared object
airscan_LDFLAGS += -Wl,-z,nodelete
$(OBJDIR)%.o: %.c Makefile airscan.h
mkdir -p $(OBJDIR)
$(CC) -c -o $# $< $(CPPFLAGS) $(airscan_CFLAGS)
.PHONY: all clean install man
all: tags $(BACKEND) $(DISCOVER) test test-decode
tags: $(SRC) airscan.h test.c test-decode.c
-ctags -R .
$(BACKEND): $(OBJDIR)airscan.o $(LIBAIRSCAN) airscan.sym
$(CC) -o $(BACKEND) -shared $(OBJDIR)/airscan.o $(LIBAIRSCAN) $(airscan_LDFLAGS)
$(DISCOVER): $(OBJDIR)discover.o $(LIBAIRSCAN)
$(CC) -o $(DISCOVER) discover.c $(CPPFLAGS) $(airscan_CFLAGS) $(LIBAIRSCAN) $(airscan_LIBS) -fPIE
$(LIBAIRSCAN): $(OBJ) Makefile
ar cru $(LIBAIRSCAN) $(OBJ)
install: all
mkdir -p $(DESTDIR)$(PREFIX)$(BINDIR)
mkdir -p $(DESTDIR)$(PREFIX)$(CONFDIR)
mkdir -p $(DESTDIR)$(PREFIX)$(CONFDIR)/dll.d
install -s -D -t $(DESTDIR)$(PREFIX)$(BINDIR) $(DISCOVER)
cp -n airscan.conf $(DESTDIR)$(PREFIX)$(CONFDIR)
cp -n dll.conf $(DESTDIR)$(PREFIX)$(CONFDIR)/dll.d/airscan
install -s -D -t $(DESTDIR)$(PREFIX)$(LIBDIR)/sane $(BACKEND)
mkdir -p $(DESTDIR)$(PREFIX)/$(MANDIR)/man5
install -m 644 -D -t $(DESTDIR)$(PREFIX)$(MANDIR)/man1 $(MAN_DISCOVER)
install -m 644 -D -t $(DESTDIR)$(PREFIX)$(MANDIR)/man5 $(MAN_BACKEND)
[ "$(COMPRESS)" = "" ] || $(COMPRESS) -f $(DESTDIR)$(PREFIX)$(MANDIR)/man1/$(MAN_DISCOVER)
[ "$(COMPRESS)" = "" ] || $(COMPRESS) -f $(DESTDIR)$(PREFIX)$(MANDIR)/man5/$(MAN_BACKEND)
clean:
rm -f test $(BACKEND) tags
rm -rf $(OBJDIR)
man: $(MAN_DISCOVER) $(MAN_BACKEND)
$(MAN_DISCOVER): $(MAN_DISCOVER).md
ronn --roff --manual=$(MAN_DISCOVER_TITLE) $(MAN_DISCOVER).md
$(MAN_BACKEND): $(MAN_BACKEND).md
ronn --roff --manual=$(MAN_BACKEND_TITLE) $(MAN_BACKEND).md
test: $(BACKEND) test.c
$(CC) -o test test.c $(BACKEND) -Wl,-rpath . ${airscan_CFLAGS}
test-decode: test-decode.c $(LIBAIRSCAN)
$(CC) -o test-decode test-decode.c $(CPPFLAGS) $(airscan_CFLAGS) $(LIBAIRSCAN) $(airscan_LIBS)
I tried generating recipe using devtool but not success with it. Can anybody help me write a recipe for this one. Thanks in advance
I'm the sane-airscan author :-), but I don't know anything about yocto. So, what is your problem?

outside header file not found during compilation

I'm trying to compile the bpf samples, outside the tree.
Here's my folder:
.
├── bpf_load.c
├── bpf_load.h
├── bpf_load.o
├── libbpf.h
├── Makefile
├── xdp1
├── xdp1_kern.c
├── xdp1_kern.o
├── xdp1_user.c
├── xdp2_kern.c
└── xdp2_user.c
And this is the Makefile:
#
# Makefile for out-of-tree building eBPF programs
# similar to kernel/samples/bpf/
#
# Still depend on a kernel source tree.
#
TARGETS = xdp1
TOOLS_PATH = /usr/src/kernels/$(shell uname -r)/tools
TARGETS_ALL = $(TARGETS)
# Generate file name-scheme based on TARGETS
KERN_SOURCES = ${TARGETS_ALL:=_kern.c}
USER_SOURCES = ${TARGETS_ALL:=_user.c}
KERN_OBJECTS = ${KERN_SOURCES:.c=.o}
USER_OBJECTS = ${USER_SOURCES:.c=.o}
# Notice: the kbuilddir can be redefined on make cmdline
kbuilddir ?= /lib/modules/`uname -r`/build/
KERNEL=$(kbuilddir)
CFLAGS := -g -O2 -Wall
# Local copy of include/linux/bpf.h kept under ./kernel-usr-include
#
CFLAGS += /usr/include/linux/bpf.h
#
# Interacting with libbpf
CFLAGS += -I$(TOOLS_PATH)/lib
CFLAGS += -I$(TOOLS_PATH)/testing/selftests/bpf
LDFLAGS= -lelf
# Objects that xxx_user program is linked with:
OBJECT_LOADBPF = bpf_load.o
OBJECTS = $(OBJECT_LOADBPF)
#
# The static libbpf library
LIBBPF = $(TOOLS_PATH)/lib/bpf/libbpf.a
# Allows pointing LLC/CLANG to another LLVM backend, redefine on cmdline:
# make LLC=~/git/llvm/build/bin/llc CLANG=~/git/llvm/build/bin/clang
LLC ?= llc
CLANG ?= clang
CC = gcc
NOSTDINC_FLAGS := -nostdinc -isystem $(shell $(CC) -print-file-name=include)
# TODO: can we remove(?) copy of uapi/linux/bpf.h stored here: ./tools/include/
# LINUXINCLUDE := -I./tools/include/
#
# bpf_helper.h need newer version of uapi/linux/bpf.h
# (as this git-repo use new devel kernel features)
KERNEL_PATH = /usr/src/kernels/$(shell uname -r)
LINUXINCLUDE := -I$(KERNEL_PATH)/include
#
LINUXINCLUDE += -I$(KERNEL_PATH)/arch/x86/include
LINUXINCLUDE += -I$(KERNEL_PATH)/arch/x86/include/generated/uapi
LINUXINCLUDE += -I$(KERNEL_PATH)/arch/x86/include/generated
LINUXINCLUDE += -I$(KERNEL_PATH)/include
LINUXINCLUDE += -I$(KERNEL_PATH)/arch/x86/include/uapi
LINUXINCLUDE += -I$(KERNEL_PATH)/include/uapi
LINUXINCLUDE += -I$(KERNEL_PATH)/include/generated/uapi
LINUXINCLUDE += -include $(KERNEL_PATH)/include/linux/kconfig.h
#LINUXINCLUDE += -I$(KERNEL)/tools/lib
EXTRA_CFLAGS=-Werror
all: dependencies $(TARGETS_ALL) $(KERN_OBJECTS)
.PHONY: dependencies clean verify_cmds verify_llvm_target_bpf $(CLANG) $(LLC)
# Most xxx_user program still depend on old bpf_load.c
$(OBJECT_LOADBPF): bpf_load.c bpf_load.h
$(CC) $(CFLAGS) -o $# -c $<
LIBBPF_SOURCES = $(TOOLS_PATH)/lib/bpf/*.c
# New ELF-loaded avail in libbpf (in bpf/libbpf.c)
$(LIBBPF): $(LIBBPF_SOURCES) $(TOOLS_PATH)/lib/bpf/Makefile
make -C $(TOOLS_PATH)/lib/bpf/ all
# Compiling of eBPF restricted-C code with LLVM
# clang option -S generated output file with suffix .ll
# which is the non-binary LLVM assembly language format
# (normally LLVM bitcode format .bc is generated)
#
# Use -Wno-address-of-packed-member as eBPF verifier enforces
# unaligned access checks where necessary
#
$(KERN_OBJECTS): %.o: %.c Makefile
$(CLANG) -S $(NOSTDINC_FLAGS) $(LINUXINCLUDE) $(EXTRA_CFLAGS) \
-D__KERNEL__ -D__ASM_SYSREG_H \
-D__BPF_TRACING__ \
-Wall \
-Wno-unused-value -Wno-pointer-sign \
-D__TARGET_ARCH_$(ARCH) \
-Wno-compare-distinct-pointer-types \
-Wno-gnu-variable-sized-type-not-at-end \
-Wno-tautological-compare \
-Wno-unknown-warning-option \
-Wno-address-of-packed-member \
-O2 -emit-llvm -c $< -o ${#:.o=.ll}
$(LLC) -march=bpf -filetype=obj -o $# ${#:.o=.ll}
$(TARGETS): %: xdp1_user.c $(OBJECTS) $(LIBBPF) Makefile
$(CC) $(CFLAGS) $(OBJECTS) $(LDFLAGS) -o $# $< $(LIBBPF)
I pretty much just copied the makfile I found here:
https://github.com/netoptimizer/prototype-kernel/blob/master/kernel/samples/bpf/Makefile
and deleted a bunch of stuff that I didn't need, and also changed it to be more dynamic and calculate the different paths using 'uname -r'.
The problem is that the original Makefile assumed that bfp_helpers.h is in the same directory as the files. But my xdp1_kern.c uses it and I can't have it in the same directory. I add -I(path to bpf_helpers.h) but it still throws error when I run it.
make LLC=<path to llc> CLANG=<path to clang>
gcc -g -O2 -Wall /usr/include/linux/bpf.h -I/usr/src/kernels/4.18.0-mlnx/tools/lib -I/usr/src/kernels/4.18.0-mlnx/tools/testing/selftests/bpf bpf_load.o -lelf -o xdp1 xdp1_user.c /usr/src/kernels/4.18.0-mlnx/tools/lib/bpf/libbpf.a
/.autodirect/net_linux_verification/tools/clang+llvm-3.8.0-linux-x86_64-centos6/bin/clang -S -nostdinc -isystem /usr/lib/gcc/x86_64-redhat-linux/7/include -I/usr/src/kernels/4.18.0-mlnx/include -I/usr/src/kernels/4.18.0-mlnx/arch/x86/include -I/usr/src/kernels/4.18.0-mlnx/arch/x86/include/generated/uapi -I/usr/src/kernels/4.18.0-mlnx/arch/x86/include/generated -I/usr/src/kernels/4.18.0-mlnx/include -I/usr/src/kernels/4.18.0-mlnx/arch/x86/include/uapi -I/usr/src/kernels/4.18.0-mlnx/include/uapi -I/usr/src/kernels/4.18.0-mlnx/include/generated/uapi -include /usr/src/kernels/4.18.0-mlnx/include/linux/kconfig.h -Werror \
-D__KERNEL__ -D__ASM_SYSREG_H \
-D__BPF_TRACING__ \
-Wall \
-Wno-unused-value -Wno-pointer-sign \
-D__TARGET_ARCH_ \
-Wno-compare-distinct-pointer-types \
-Wno-gnu-variable-sized-type-not-at-end \
-Wno-tautological-compare \
-Wno-unknown-warning-option \
-Wno-address-of-packed-member \
-O2 -emit-llvm -c xdp1_kern.c -o xdp1_kern.ll
xdp1_kern.c:15:10: fatal error: 'bpf_helpers.h' file not found
#include "bpf_helpers.h"
^
1 error generated.
make: *** [Makefile:93: xdp1_kern.o] Error 1
I'm was sure that adding -I/usr/src/kernels/4.18.0-mlnx/tools/testing/selftests/bpf will solve it as this is where bpf_helpers.h are on my machine. But it didn't, it only solved the include for bpf_utils.h.
You do not use the CFLAGS you modified when trying to compile your BPF program.
You do use the CFLAGS when compiling the user space programs:
# Most xxx_user program still depend on old bpf_load.c
$(OBJECT_LOADBPF): bpf_load.c bpf_load.h
$(CC) $(CFLAGS) -o $# -c $<
And
$(TARGETS): %: xdp1_user.c $(OBJECTS) $(LIBBPF) Makefile
$(CC) $(CFLAGS) $(OBJECTS) $(LDFLAGS) -o $# $< $(LIBBPF)
The latter gives you your first two lines of output, where your directory to search does appear:
make LLC=<path to llc> CLANG=<path to clang>
gcc -g -O2 -Wall [...] -I/usr/src/kernels/4.18.0-mlnx/tools/testing/selftests/bpf [...]
However, starting from the next line, this is a different command, calling clang to compile your BPF program. It comes from that Makefile code:
$(KERN_OBJECTS): %.o: %.c Makefile
$(CLANG) -S $(NOSTDINC_FLAGS) $(LINUXINCLUDE) $(EXTRA_CFLAGS) \
[...]
... Which does not use the $(CFLAGS). Just add it to the clang command in the Makefile, this should solve your problem.

Makefile error in C linux

I have an error while making my makefile in linux. Here's my code:
CC = gcc
CFLAGS = -Wall -m32 -g -fno-stack-protector -z execstack -O0
SHELL_SOURCES = Shell.c
SHELL = Shell
.PHONY: all target1 clean
all: target1
target1: $(SHELL)
$(SHELL): $(SHELL_SOURCES)
$(CC) $(CFLAGS) $^ -o $#
clean:
rm -rf $(SHELL)
The error I get is:
gcc -Wall -m32 -g -fno-stack-protector -z execstack -O0 Shell.c -o Shell
make: Shell: Command not found
Makefile:16: recipe for target 'Shell' failed
make: *** [Shell] Error 127
You can't use SHELL as a variable in a Makefile, it is used to know what shell (/bin/sh, /bin/bash, etc) will be used in your Makefile.
CC = gcc
CFLAGS = -Wall -m32 -g -fno-stack-protector -z execstack -O0
EXE_SOURCES = Shell.c
EXE = Shell
.PHONY: all target1 clean
all: target1
target1: $(EXE)
$(EXE): $(EXE_SOURCES)
$(CC) $(CFLAGS) $^ -o $#
clean:
rm -rf $(EXE)
Take more time to read documentation of GNU make
You should remove spaces around variable assignments, e.g. code
CC= gcc
Beware that tab characters are significant in Makefile-s (in rules, for their action lines). Use some editor aware of that (e.g. emacs has a mode for Makefile). See also this example (but the rule action should really start with a tab character). Notably, you need a tab just before the $(CC) $(CFLAGS) $^ -o $# and another one before rm.
Consider also using remake -x to debug your Makefile, or at least make --trace
But the main bug was indeed, as answered by Cpatricio, to use the SHELL variable. Be careful when using variables or names already known to make. Actually, I have the habit of prefixing my make variable names with a common prefix, so you could have defined your variables like JOJOIGA_SOURCES=$(wildcard *.c), JOJOIGA_SHELL=Shell etc....

make for compiling — all *.c files in folders & subfolders in project

To compile two files i have created a makefile where i use to mention the object name or i can use the pattern rule using patsubst.
# ----------------------------------------------------------------------------
# Makefile for building tapp
#
# Copyright 2010 FriendlyARM (http://www.arm9.net/)
#
ifndef DESTDIR
DESTDIR ?= /opt/FriendlyARM/tiny6410/linux/rootfs_qtopia_qt4
endif
#CFLAGS = -c -Wall -O2 # wall is for warning show and 02 is optiminisation level 2
CFLAGS = -c -O2 # wall is for warning show and 02 is optiminisation level 2
#CC = arm-linux-gcc # compiler name
CC = gcc # compiler name
LD = ld
INSTALL = install #
TARGET = led_player_project
#OBJ = led-player_backup.o led-player.o
OBJ := $(patsubst %.c,%.o,$(wildcard *.c */*.c))
#OBJ = $(shell find . -name '*.c')
all: $(TARGET)
#all: $(OBJ)
led_player_project : $(OBJ)
$(LD) $(LDFLAGS) -o $# $(OBJ) $(LIBS)
# $(LD) $(LDFLAGS) -o $# $< $(LIBS)
%.o : %.c
$(CC) $(CFLAGS) $< -o $#
#$< -o $#
install: $(TARGET)
$(INSTALL) $^ $(DESTDIR)/usr/bin
clean :
rm -rf *.o $(TARGET) $(OBJ)
# ----------------------------------------------------------------------------
.PHONY: $(PHONY) install clean
# End of file
# vim: syntax=make
#EOF
Now if my project contains folder contains subfolders & they contains further files. Then can i write pattern rule to compile every file & create an common executable?
1> Do i will have to create makefile in every-subfolder so that i can invoke that makefile from main makefile, like integrating static driver to linux kernel each driver have respective makefile ?
2> Or common makefile for full project ?
3> can i use patsubst to compile every file without mentioning there name.
4> How can i combine every *.o to create on executable called main.
Edit :---
#Jan Hudec
I have modified my makefile as per your comment (i have posted it above). Now i am just trying with two folders inside my main folder. I am getting following error
Folder structure :--
main Folder ----> one Folder
----> two Folder
Folder Main contains :--
main.c
main.h
Makefile
Folder one contains :--
one.c
one.h
Folder two contains :--
two.c
two.h
main.c content :--
#include <stdio.h>
#include <stdlib.h>
#include "main.h"
int main()
{
char *p;
printf("\n\n main \n");
one();
two();
return 0;
}
main.h content :---
#include "one/one.h"
#include "two/two.h"
one.c content :---
#include <stdio.h>
#include <stdlib.h>
#include "one.h"
void one()
{
printf("\n one \n");
}
one.h content :---
void one();
two.c content :---
#include <stdio.h>
#include <stdlib.h>
#include "two.h"
void two()
{
printf("\n two \n");
}
two.h content :---
void two();
Error i got at make time :----
ignite#ignite:~/testing/main$ make
gcc -c -O2 main.c -o main.o
gcc -c -O2 one/one.c -o one/one.o
gcc -c -O2 two/two.c -o two/two.o
ld -o led_player_project main.o one/one.o two/two.o
ld: warning: cannot find entry symbol _start; defaulting to 0000000008048080
main.o: In function `main':
main.c:(.text.startup+0x11): undefined reference to `puts'
one/one.o: In function `one':
one.c:(.text+0xb): undefined reference to `puts'
two/two.o: In function `two':
two.c:(.text+0xb): undefined reference to `puts'
make: *** [led_player_project] Error 1
ignite#ignite:~/testing/main$
Ad 1 and 2: The filenames can safely include directories and % matches / as necessary. So you can easily have:
$(wildcard subdir/*.c) $(wildcard anotherdir/*.c)
or even
$(wildcard */*.c)
... or as suggested by keltar in comment
$(shell find . -name '*.c')
which is recursive.
Ad 3: You are doing it.
Ad 4: Create a target with $(OBJ) as dependencies and use the automatic variable just as you do for compilation:
main : $(OBJ)
$(LD) $(LDFLAGS) -o $# $< $(LIBS)
Perhaps another solution too. I have a source directory in my project dir which contains subdirectories. And I dont want have a Makefile in every subdirectories or something else. And I want to build everything only with one makefile in rootdir of project: So for my static library in c++ i did this makefile. Perhaps it could be a solution for you too. But I didnt test it well with paralell builds via "make -j4" or so.
BUILDCXX=g++-10
CHECKCXX=clang++-12
CXXFLAGS=-std=c++17 -Wall -Werror -Wextra -g -pg -O0 -I. -DDEBUG
CXXFLREL=-std=c++17 -Wall -Werror -Wextra -O3 -s -I. -DNDEBUG
CXXFLAGSLIB=$(CXXFLAGS)
CXXFLAGSTST=$(CXXFLAGS) -DRLOG_COMPONENT="clbc"
LDFLAGS=
LDFLAGSLIB=$(LDFLAGS)
LDFLAGSTST=$(LDFLAGS) -L./target/lib -lUnitTest++ -lclbc
OUTDIR=target
OUTDIRLIB=$(OUTDIR)/lib
OUTDIRTST=$(OUTDIR)/bin
OUTDIROBJ=$(OUTDIR)/obj
OUTFILELIB=libclbc.a
OUTFILETST=runtests
SRCDIR=source
SRCDIRLIB=$(SRCDIR)/lib
SRCDIRTST=$(SRCDIR)/test
SRCDIRSLIBR := $(shell find $(SRCDIRLIB) -maxdepth 3 -type d)
SRCFILESLIB := $(foreach dir,$(SRCDIRSLIBR),$(wildcard $(dir)/*.cpp))
OBJFILESLIB := $(addprefix $(OUTDIROBJ)/,$(notdir $(patsubst %.cpp,%.o,$(SRCFILESLIB))))
SRCDIRSTSTR := $(shell find $(SRCDIRTST) -maxdepth 3 -type d)
SRCFILESTST := $(foreach dir,$(SRCDIRSTSTR),$(wildcard $(dir)/*.cpp))
OBJFILESTST := $(addprefix $(OUTDIROBJ)/,$(notdir $(patsubst %.cpp,%.o,$(SRCFILESTST))))
.PHONY: all
all: clean lib
check-syntax:
$(CHECKCXX) $(CXXFLAGS) -s -o /dev/null -S $(CHK_SOURCES)
clean:
#rm -rf $(OUTDIR)
lib:$(OBJFILESLIB)
#mkdir -p $(OUTDIRLIB)
#echo " TargetLib :" $(OUTDIRLIB)/$(OUTFILELIB)
# ar rcs $(OUTDIRLIB)/$(OUTFILELIB) $^
test:$(OBJFILESTST)
#mkdir -p $(OUTDIRTST)
#echo "TargetTest :" $(OUTDIRTST)/$(OUTFILETST)
# $(BUILDCXX) $(OBJFILESTST) -o $(OUTDIRTST)/$(OUTFILETST) $(LDFLAGSTST)
release: CXXFLAGSLIB=$(CXXFLREL)
release:$(OBJFILESLIB)
#mkdir -p $(OUTDIRLIB)
#echo "RTargetLib :" $(OUTDIRLIB)/$(OUTFILELIB)
# ar rcs $(OUTDIRLIB)/$(OUTFILELIB) $^
define set_real_src_file
$(eval REAL_SRC_FILE=$(strip $(1)))
endef
define set_nothing
endef
define get_real_src_file
$(if $(strip $(findstring $(strip $(1)),$(strip $(2)))),$(call set_real_src_file,$(2)),$(call set_nothing))
endef
define get_source_file
#echo ObjectFile : $(1)
$(eval REAL_SRC_SEARCH=$(notdir $(patsubst %.o,%.cpp,$(1))))
$(eval REAL_SRC_FILE=)
$(foreach word,$(2), $(call get_real_src_file, $(REAL_SRC_SEARCH),$(word)))
endef
$(OBJFILESLIB): $(SRCFILESLIB)
#mkdir -p $(OUTDIROBJ)
$(call get_source_file,$#,$^,$<)
# $(BUILDCXX) $(CXXFLAGSLIB) -c $(REAL_SRC_FILE) -o $#
$(OBJFILESTST): $(SRCFILESTST)
#mkdir -p $(OUTDIROBJ)
$(call get_source_file,$#,$^,$<)
# $(BUILDCXX) $(CXXFLAGSTST) -c $(REAL_SRC_FILE) -o $#
But I guess it runs only with GNUMake and no other implementations of make.

math.h refer failure when compile LinSched 3.3 under 64-bit Ubuntu12.04

Compiling the LinSched 3.3 under 64-bit Ubuntu-12.04 throws me the following errors:
******/home/xxxxx/Desktop/linsched_3.3/tools/linsched/tests/linsched_rand_test.c:169: undefined reference to `sqrt'
collect2: ld returned 1 exit status
make[1]: [linsched_rand_test] Error 1
make[1]: Leaving directory `/home/jianguo/Desktop/linsched_3.3/tools/linsched/tests'
make: [all] Error 2*
Seems there is a problem when refer/link to the math.h, which is:
math: /usr/include/math.h
From the make file of LinSched 3.3, the CFLAGS and LFLAGS are defined as follows,
CC = ${CROSS_COMPILE}gcc
CFLAGS = -g -O2 -m64 -D__KERNEL__ -D__LINSCHED__ -Wall -Wundef -Wstrict-prototypes \
-Werror-implicit-function-declaration -fno-common \
-I${LINSCHED_DIR}/include -I${LINUXDIR}/include \
-I${LINUXDIR}/arch/linsched/include -I${LINSCHED_DIR}/ \
-include ${LINSCHED_DIR}/include/generated/autoconf.h \
-Wno-pointer-sign -include ${LINUXDIR}/include/linux/kconfig.h
CFLAGS_LINUX = $(CFLAGS) -nostdinc -isystem $(shell $(CC) -print-file-name=include) \
-include ${LINSCHED_DIR}/linux_linsched.h \
-Wno-unused -Wno-strict-aliasing
LFLAGS = -lm
....
...
...
LD_PERCPU = ${LD} -r -T ${LINSCHED_DIR}/linsched.lds
OBJ_FILES = ${LINSCHED_OBJS} ${LINUX_OBJS}
DEPS := ${OBJ_FILES:.o=.d}
-include ${DEPS}
TIME_HDR=${LINUXDIR}/kernel/timeconst.h
${TIME_HDR}: ${LINUXDIR}/kernel/timeconst.pl
#echo "(Generating timeconst.h)"
#perl ${LINUXDIR}/kernel/timeconst.pl 1000 > $#
${LINUX_OBJS}: %.o: %.c ${TIME_HDR}
#echo "CC KERNEL $<"
#${CC} -o $# ${CFLAGS_LINUX} -c $< -MMD
%.o: %.c
#echo "CC SIM $<"
#${CC} ${CFLAGS} -o $# -c $< -MMD
Someone on the web suggested to add -lm into the CFLAGS, I tried to insert the -lm parameter to several places of the CFLAGS, but the same errors persist.
Any idea ???
BTW, I compiled the LinSched 3.3 under 64-bit ubuntu becasue in the CFLAGS it is configured as -m64. And a former compile under 32-bit Ubuntu throws me error of data incompatibility(between elf64-x86-64 and elf32-i386)
As suggested by #another.anon.coward, I checked how the LFLAGs is used later, and find it is vever used. As a solution, how should I modify the makefile to add the LFLAGS parameter ???
Actually the issue was that linker flag ${LFLAGS} was used in /tools/linsched/tests/Makefile incorrectly.
Here is the patch that fixes the math library link related build issue for linsched:
diff --git a/tools/linsched/tests/Makefile b/tools/linsched/tests/Makefile
index 91bb8eb..8074c93 100644
--- a/tools/linsched/tests/Makefile
+++ b/tools/linsched/tests/Makefile
## -33,7 +33,7 ## TEST_DEPS := ${TESTS:%=%.d}
${TESTS}: ${OBJ_FILES} $$#.o
#echo CC TEST $#
#${LD_PERCPU} -o $#.percpu $^
- #${CC} ${LFLAGS} -o $# $#.percpu -MMD
+ #${CC} -o $# $#.percpu ${LFLAGS} -MMD
#rm $#.percpu
clean:

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