De-interleave audio channels using SIMD instructions - audio

Question

I'm implementing a sound mixer, it works well without SIMD instructions, but having a hard time figuring out how to extract my sound data into separate channels.
My data comes in an interleaved format: L0R0 L1R1 L2R2 L3R3...
I load them into a __m128i in the same format, so I have 4 sample in the register.
I'd like them to be in separate channels: L0L1L2L3 R0R1R2R3. This is the part that I'm missing.
So the input is: 8 x i16 (4xi32 interleaved)
I would like the output as left = 4 x f32 and right = 4 x f32, then do the mixing.
After the mixing, I can interleave the channels and i get L0R0 L1R1 L2R2...:
__m128 *src0 = mixed_channel0;
__m128 *src1 = mixed_channel1;
__m128 *dest = (__m128i *)buffer;
for (u32 sample_index = 0; sample_index < sample_chunk_count; ++sample_index)
{
__m128 s0 = _mm_load_ps((f32 *)src0++);
__m128 s1 = _mm_load_ps((f32 *)src1++);
__m128i l = _mm_cvtps_epi32(s0);
__m128i r = _mm_cvtps_epi32(s1);
__m128i lr0 = _mm_unpacklo_epi32(l, r);
__m128i lr1 = _mm_unpackhi_epi32(l, r);
*dest++ = _mm_packs_epi32(lr0, lr1);
}
Basically I need to do the opposite:
__m128i input = [L0R0, L1R1, L2R2, L3R3] packed pairs of 16bit ints
// magic happens, then
__m128 left = [L0, L1, L2, L3] packed 32bit floats
__m128 right = [R0, R1, R2, R3] packed 32bit floats
Even if I mask out the low/high order i16-s, then how can i convert them to f32-s? After masking out i would get:
__m128i right = [xx, R0, xx, R1, xx, R2, xx, R3]
__m128i left = [L0, xx, L1, xx, L2, xx, L3, xx]
If I could convert them to 4 x i32-s then it would be easy to convert them to f32-s with _mm_cvtepi32_ps and i would be done.
Thanks.

Answer 1

Mask and shift to go from pairs of 16-bit samples 32-bit samples.
// clunky calling convention, but should inline ok.
__m128 unpack_leftright_16bit_channels(__m128i input, __m128 &right_retval) {
// input = [L0R0, L1R1, L2R2, L3R3] packed pairs of 16bit ints
__m128i sign_extended_left = _mm_srai_epi32(input, 16);
__m128i high_right = _mm_slli_epi32(input, 16);
__m128i sign_extended_right = _mm_srai_epi32(high_right, 16);
right_retval = _mm_cvtepi32_ps(sign_extended_right);
//__m128 right = [R0, R1, R2, R3] packed 32bit floats
__m128 left = _mm_cvtepi32_ps(sign_extended_left);
//__m128 left = [L0, L1, L2, L3] packed 32bit floats
return left;
}
This compiles to what you'd expect with gcc5.3, or clang3.7.
This will bottleneck on shuffle throughput on most microarchitectures (see Agner Fog's insn tables and microarch pdf, and other links in the x86 tag wiki). It might be worth using SSSE3 pshufb to do the logical left-shift, only using actual shift instructions for the arithmetic right shifts that need to leave a copy of the sign bit in the upper half of each 32-bit element. Without AVX, pshufb shuffles in-place, just like pslld shifts in-place (thanks, Intel :(), so it doesn't avoid the extra MOV instruction to make a 2nd copy of the input.
On Skylake, immediate vector shifts run on p0/p1, and so does cvtdq2ps. Using pshufb for the left shift would increase throughput to one float output vector per clock, since shuffles run on port 5.
Pre-skylake, immediate vector shifts only run on a single port, e.g. p0 in Haswell. At least that's not the same port as int->float: Haswell runs cvtdq2ps on p1. So again, pshufb would increase throughput to one ps vector per clock.
It seems like there should be a better way to do this, like with an AND mask or something. But it seems that 2 shifts, or a shuffle+shift, are the best way to sign-extend the low 16 bits of every 32-bit element into the full 32-bit element.